Multilayer interconnection and method

Metal fusion bonding – Process – Plural joints

Reexamination Certificate

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Details

C228S164000, C228S215000

Reexamination Certificate

active

06543674

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to electrical interconnections for circuit boards and the like. More particularly, the present invention provides for coupling electrode pads of semiconductor devices to circuit boards, and for a structure for packaging semiconductor devices. The present invention also provides a method for fabricating an electronic device and for soldering techniques or procedures in the process of fabricating a semiconductor device having solder joints.
2. Description of the Prior Art
Semiconductor device packages or integrated circuit (IC) chips may, in general, operate by means of being mounted on a substrate, such as a printed circuit substrate which comprises an interconnection pattern for a circuit to be assembled, to electrically connect with other electrical/electronic devices (e.g., resistors, capacitors, ICs). For the purpose of electrically connecting to other such devices over the interconnection pattern, the semiconductor device packages or the IC chips comprise a number of external electrodes, while the interconnection pattern on the substrate contains a number of contact pads to be connected to the external electrodes of the semiconductor device packages or of the IC chips. Various methods for electrically connecting semiconductor device packages or IC chips to printed circuit substrates are well known in the art. An electrically-conductive bond (e.g., a solder bump) may be used to mechanically and electrically connect to a printed circuit substrate.
In recent years, leadless packages, also known as chip carriers, have come into increasing use for accommodating integrated circuits (IC), large-scale integrated circuits (LSI), and the like. Like conventional packages with outer leads, leadless packages accommodate an IC chip therein and outer pads of the leadless package are electrically connected to the substrate and circuit board by soldering. They therefore can be used in popular assembly processes. At the same time, provision of conductor pads as outer pads in place of outer leads enables a more compact structure. Therefore, such packages can be mounted at a higher density on a substrate, compared with other packages. This feature has resulted in.leadless packages being widely used in a broad range of fields.
There is, however, a problem with mounting the package to the substrate and circuit board by a rigid soldering technique in that the electrical connections tend to fracture as a result of thermal cycling. Normally, the package, substrate, and circuit board are formed of different materials having different coefficients of expansion. During the heating required to accomplish the mounting and during normal operating conditions, the package, substrate, and the circuit board contract and expand at different rates, thereby generating stresses. These stresses can fracture the package, substrate, circuit board, or soldered conductor pads. The problem is compounded the greater the size of the devices.on the circuit board. Such breakage, of course, has a fatal effect oh the operation of the electronic circuits formed on the circuit board. There is also the problem in the soldering technique in that after reflowing the solder for electrically connecting joints, the solder joint should be cleaned. Traditionally, cleaning after soldering is not easy when flux is employed after solder reflow. Therefore, what is needed and what has been invented inter alia is a method for coupling or joining together a solder electrical connection in a process of fabricating a semiconductor assembly having solder joints.
SUMMARY OF THE INVENTION
An embodiment of the present invention provides a method for electrically coupling electrode pads comprising the steps of:
(a) forming a reflowed solder bump having a solder material with a melting temperature and disposed on a first electrode pad supported by a first substrate;
(b) forming a second electrode pad on a second substrate, such that the second electrode pad includes an electrode structure defined by at least one converging continuous arcuate surface terminating in an apex and having an electrode material whose melting temperature is greater than the melting temperature of the solder material;
(c) heating the solder bump to soften the solder material; and
(d) pressing the apex of the second electrode pad into the heated solder bump to couple the first electrode pad to the second electrode pad.
The immediate foregoing method preferably additionally comprises disposing an underfill material on the first substrate prior to heating step (c). The underfill material is preferably heated after pressing step (d), and includes a reflow temperature that is lower than its curing temperature. The underfill material also preferably comprises a curing temperature that is higher than a reflow temperature of the solder material. Heating of the underfill material preferably expands the underfill material, and after the underfill material cools, the cooled underfill material remains at least partially expanded. The forming step (b) preferably comprises selectively removing (e.g., by electro-dissolution) electrode material from a layer of electrolyte-immersed electrode material which composes the second electrode pad. Alternatively, the forming step (b) employs a die or mold which is capable of being heated (e.g., electrically) to melt electrode material until the second electrode pad is formed with the desired shape. The die or mold includes an internal surface which mirrors the arcuate surface terminating in the apex. Any two continuous lines along the at least one converging continuous arcuate surface tangentially meet.
Another embodiment of the present invention provides for a semiconductor assembly comprising a first semiconductor substrate; a first electrode pad connected to the first semiconductor substrate; and a reflowed solder bump supported by the first electrode pad. The semiconductor assembly also includes a second semiconductor substrate and a second electrode pad coupled to the second semiconductor substrate. The second electrode pad is at least partially embedded in the reflowed solder bump and has an electrode structure defined by at least one converging continuous arcuate surface terminating in an apex. When the electrode structure is defined by a pair of opposed continuous arcuate surfaces, the continuous arcuate surfaces tangentially terminate in an apex.
A further embodiment of the present invention provides a semiconductor device comprising a semiconductor substrate, and an electrode pad coupled to the semiconductor substrate and comprising an electrode structure defined by at least one converging continuous arcuate surface terminating in an apex. Another electrode pad may be connected to the semiconductor substrate and to the electrode pad such as to be disposed between the semiconductor substrate and the electrode pad.
Additionally embodiments of the present invention also provide a method for solder bump reflow comprising the steps of:
(a) forming a reflowed solder bump having a solder material with a melting temperature and disposed on a first electrode pad supported by a first substrate;
(b) forming a second electrode pad on a second substrate, such that the second electrode pad includes an electrode structure defined by at least on converging continuous arcuate surface terminating in an apex and having an electrode material whose melting temperature is greater than the melting temperature of the solder material;
(c) pressing the apex of the second electrode pad into the reflowed solder bumps; and
(d) reflowing the solder material of the reflowed solder bump.


REFERENCES:
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patent: 5132772 (1992-07-01), Fetty
patent: 5164818 (1992-11-01), Blum et al.
patent: 5406458 (1995-04-01), Schutt
patent: 5447871 (1995-09-01), Goldstein
patent: 5481205 (1996-01-01),

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