Multifunctional access devices, systems and methods

Details Multifunctional access devices, systems and methods Multifunctional access devices, systems and methods

1995-06-07

2000-11-28

Yoo, Do Hyun

Electrical computers and digital processing systems: memory

Address formation

Address mapping

711 5, 711203, 711205, 711206, G06F 1200

Patent

active

061548243

ABSTRACT:
A multifunction access circuit for use with first and second digital computers each having an address bus for supplying addresses and a data bus for supplying data. The access circuit has an address decoder with inputs for the address bus from the first computer, and an address translator circuit having address inputs for addresses supplied by the address bus of the first computer and outputs for translated addresses to the address bus of the second computer. The address translator circuit also has registers selectable by the address decoder and data inputs to program the registers so selected with data from the data bus from the first computer. Also in the access circuit is a port circuit with registers controlled by the address decoder for entry of address information from the data bus of the first computer and assertion of the address information on the address bus of the second computer. Further, a mode control circuit is connected to the address decoder and connected to the data bus to program the mode control circuit to selectively establish operation of the address translator circuit and of the port circuit. Other access circuits, devices, systems and methods are also described.

REFERENCES:
patent: 4503429 (1985-03-01), Schreiber
patent: 4677573 (1987-06-01), Brown et al.

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