Multichip semiconductor device

Details Multichip semiconductor device Multichip semiconductor device

2000-03-02

2002-01-08

Tokar, Michael (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S039000, C326S040000, C326S101000

Reexamination Certificate

active

06337579

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a multichip semiconductor device having a field-programmable gate array.
2. Description of the Prior Art
FPGAs (field-programmable gate arrays) allow their users to program desired circuits, and are thus often used in particular when a variety of products are manufactured in small quantities. As shown in
FIG. 5
, a conventional FPGA is built as an FPGA chip
100
having a programmable gate array
101
and an SRAM (static RAM)
102
for setting the states of the switches thereof integrated together by a CMOS process. This FPGA chip
100
is enclosed in an IC package, and an EPROM
110
is externally connected thereto. By writing to this EPROM
110
the setting information about how to set the states of the switches of the programmable gate array
101
, it is possible to obtain a desired circuit.
In general, an FPGA chip
100
and an EPROM
110
are enclosed in separate IC packages, and they are connected together through a printed circuit board.
However, in this structure, the FPGA chip
100
needs to be provided with connection pads for achieving connection to the EPROM
110
, and, quite inconveniently, this requires an accordingly large chip area or sets a limit on the number of input/output signals allowed into and out of the programmable gate array
101
.
This can be overcome by integrating an FPGA and an EPROM together on a single chip. However, forming a gate array and an EPROM on a common chip requires an extremely complicated process and leads to a steep rise in manufacturing cost. Thus, this is not a desirable solution.
Moreover, once electronic apparatuses having an FPGA and an EPROM integrated together on a single chip become widely available on the market, it is easy for a third party to read the contents of the EPROM. Quite inconveniently, this endangers the secrecy of the information stored in the EPROM.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a multichip semiconductor device having a field-programmable gate array but nevertheless provided with a minimum number of external connection terminals.
Another object of the present invention is to provide a multichip semiconductor device having a field-programmable gate array but nevertheless capable of ensuring the secrecy of the setting information stored therein with satisfactory reliability.
To achieve the above objects, according to the present invention, a multichip semiconductor device is provided with: a first semiconductor chip having a field-programmable gate array; a second semiconductor chip having a programmable non-volatile memory for storing setting information about how to set the circuit of the field-programmable gate array; and a first connecting member for connecting the field-programmable gate array and the non-volatile memory to each other.
In this structure, the setting information about the field-programmable gate array formed on a first semiconductor chip is stored in the non-volatile memory formed in a second semiconductor chip, and these first and second semiconductor chips are connected to each other by a chip-to-chip connection member. The first and second semiconductor chips are, for example, enclosed in a common package so as to form a multichip semiconductor device. This makes it possible to eliminate external connection terminals for setting the circuit of the field-programmable gate array, and thus helps reduce the total number of external connection terminals required, alleviating the limit on the number of input/output signals allowed into and out of the field-programmable gate array. Moreover, since the field-programmable gate array and the non-volatile memory are formed on separate chips, it is not necessary to use a complicated manufacturing process.


REFERENCES:
patent: 4697095 (1987-09-01), Fujii
patent: 5440423 (1995-08-01), Cooke et al.
patent: 5640107 (1997-06-01), Kruse
patent: 5801547 (1998-09-01), Kean
patent: 5977640 (1999-11-01), Bertin et al.
patent: 6049222 (2000-04-01), Lawman
patent: 05013663 (1993-01-01), None
patent: 05167004 (1993-07-01), None

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