Multichip package or system-in package

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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Details

C257S686000, C257S690000, C257S723000, C257S773000, C257SE21526, C257SE23171, C257SE25013

Reexamination Certificate

active

07851898

ABSTRACT:
Disclosed is a multichip package or system-in package which the logic chip includes a selector circuit which, by transmitting a test mode select signal or a test mode select command to the logic chip, enables access from a logic signal pin connected to the logic chip, to a memory control signal to each of the “m” number of memory chips; and the memory control signal, when viewed from the logic chip, is connected using a one-for-one wiring scheme or a one-for-up-to-m branch wiring scheme, between the selector circuit and each of the “m” number of memory chips. This multichip package or system-in package is low in noise and high in operational reliability.

REFERENCES:
patent: 4574235 (1986-03-01), Kelly et al.
patent: 5502333 (1996-03-01), Bertin et al.
patent: 5798282 (1998-08-01), Bertin et al.
patent: 5808351 (1998-09-01), Nathan et al.
patent: 6600222 (2003-07-01), Levardo
patent: 6777797 (2004-08-01), Egawa
patent: 2000-332192 (2000-11-01), None
patent: 2001-196526 (2001-07-01), None
patent: 2003-158239 (2003-05-01), None
patent: 2004-031754 (2004-01-01), None
patent: 2004-158098 (2004-06-01), None

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