Multichip package having exposed common pads

Details Multichip package having exposed common pads Multichip package having exposed common pads

1996-09-19

1998-09-15

Picard, Leo P.

Electricity: electrical systems and devices

Housing or mounting assemblies with diverse electrical...

For electronic systems and devices

361760, 361783, 361807, 361820, 257690, 257691, 257692, 257698, 257723, 257724, 257735, 257773, 257774, 174 521, 174 524, 174257, 174261, 174263, H01L 2700

Patent

active

058088776

ABSTRACT:
A multichip package having individual chips which can be tested at the package level. A first pattern of conductive wires is formed on an upper surface of the circuit board for electrically connecting the individual chips. A second pattern of conductive wires is formed on the upper surface of the circuit board for providing data connections between the individual chips. Common pads formed in the circuit board extend from the upper surface to a lower surface of the circuit board, and the second patten of conductive wires is connected via the common pads. A molding compound is formed over the upper surface of the circuit board, embedding the individual chips and the first and second conductive patterns, while leaving the lower surface of the circuit board and a lower surface of the common pads exposed. A test socket having pad contact pins corresponding to the locations of the common pads, is placed at the lower surface of the circuit board so that signals may be applied and detected at common pads.

REFERENCES:
patent: 4535219 (1985-08-01), Silwa, Jr.
patent: 4658332 (1987-04-01), Baker et al.
patent: 5394304 (1995-02-01), Jones
patent: 5400221 (1995-03-01), Kawaguchi

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