Static information storage and retrieval – Read/write circuit – Testing
Patent
1991-03-18
1994-04-05
Mottola, Steven
Static information storage and retrieval
Read/write circuit
Testing
36518902, 36518904, G11C 2900
Patent
active
053011554
ABSTRACT:
A semiconductor storage device including a plurality of blocks each having an array of memory cells includes an exclusive OR circuit provided in each of the plurality of blocks for making a determination as to whether data written in memory cells in the blocks are normally read. Exclusive OR circuits of a plurality of memory cell array blocks are connected to an OR circuit. With an output signal from the OR circuit, a determination is made as to whether a plurality of memory cell array blocks are normal or not. Since test data from a plurality of memory cell array blocks are simultaneously examined by an OR circuit, a test time for the semiconductor storage device can be reduced.
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Murakami Shuji
Wada Tomohisa
Mitsubishi Denki & Kabushiki Kaisha
Mottola Steven
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