Static information storage and retrieval – Systems using particular element – Amorphous
Reissue Patent
1999-11-08
2001-07-03
Elms, Richard (Department: 2824)
Static information storage and retrieval
Systems using particular element
Amorphous
C257S003000, C257S004000
Reissue Patent
active
RE037259
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to a uniquely designed solid state, electrically and optically operated, directly overwritable, low energy, very fast switching, non-volatile, analogue and multilevel single-cell operating memory element, and to high density electrical memory arrays fabricated from these elements. More specifically, the present invention relates to a memory element having a tapered contact layer.
BACKGROUND AND PRIOR ART
The Ovonic EEPROM is a novel, proprietary, high performance, non-volatile, thin-film electronic memory device. Its advantages include non-volatile storage of data, potential for high bit density and, consequently, low cost because of its small footprint and simple two-terminal device configuration, long reprogramming cycle life, low programming energies and high speed. The Ovonic EEPROM is capable of both analog and digital forms of information storage. Digital storage can be either binary (one bit per memory cell) or multi-state (multiple bits per cell). Only minor modifications are necessary to switch between the two digital modes. For purposes of the instant invention, the terms “memory elements” and “control elements” will be employed synonymously.
EARLY ELECTRICAL PHASE CHANGE MEMORY
The general concept of utilizing electrically writable and erasable phase change materials (i.e., materials which can be electrically switched between generally amorphous and generally crystalline states) for electronic memory applications is well known in the art, as is disclosed, for example, in U.S. Pat. No. 3,271,591 to Ovshinsky, issued Sep. 6, 1996 and in U.S. Pat. No. 3,530,441 to Ovshinsky, issued Sep. 22, 1970, both of which are assigned to the same assignee as the present invention, and both disclosures of which are incorporated herein by reference (hereinafter the “Ovshinsky patents”).
As disclosed in the Ovshinsky patents, such phase change materials can be electrically switched between structural states of generally amorphous and generally crystalline local order or between different detectable states of local order across the entire spectrum between completely amorphous and completely crystalline states. That is, the Ovshinsky patents describe that the electrical switching of such materials is not required to take place between completely amorphous and completely crystalline states but rather can be in incremental steps reflecting changes of local order to provide a “gray scale” represented by a multiplicity of conditions of local order spanning the spectrum between the completely amorphous and the completely crystalline states. The early materials described by the Ovshinsky patents could also, if required, be switched between just the two structural states of generally amorphous and generally crystalline local order to accommodate the storage and retrieval of single bits of encoded binary information.
In the typical personal computer there are often four tiers of memory. Archival information is stored in inexpensive, slow, high storage capacity, non-volatile devices such as magnetic tape and floppy disks. This information is transferred, as needed, to faster and more expensive, but still non-volatile, hard disk memories. Information from the hard disks is transferred, in turn, to the still more expensive, faster, volatile system memory which uses semiconductor dynamic RAM (DRAM) devices. Very fast computers even transfer forth and back small portions of the information stored in DRAM to even faster and even more expensive volatile static RAM (SRAM) devices so that the microprocessor will not be slowed down by the time required to fetch data from the relatively slower DRAM. Transfer of information among the tiers of the memory hierarchy occupies some of the computer's power and this need for “overhead” reduces performance and results in additional complexity in the computer's architecture. The current use of the hierarchal structure, however, is dictated by the price and performance of available memory devices and the need to optimize computer performance while minimizing cost.
The electrically erasable phase change memories described in the Ovshinsky patents, as well as subsequent electrical solid state memory, had a number of limitations that prevented their widespread use as a direct and universal replacement for present computer memory applications, such as tape, floppy disks, magnetic or optical hard disk drives, solid state disk flash, DRAM, SRAM, and socket flash memory. Specifically, the following represent the most significant of these limitations: (i) a relatively slow (by present standards) electrical switching speed, particularly when switched in the direction of greater local order (in the direction of increasing crystallization); (ii) a relatively high input energy requirement necessary to initiate a detectable change in local order; and (iii) a relatively high cost per megabyte of stored information (particularly in comparison to present hard disk drive media).
The most significant of these limitations is the relatively high energy input required to obtain detectable changes in the chemical and/or electronic bonding configurations of the chalcogenide material in order to initiate a detectable change in local order. Also significant were the switching times of the electrical memory materials described in the Ovshinsky patents. These materials typically required times in the range of a few milliseconds for the set time (the time required to switch the material from the amorphous to the crystalline state); and approximately a microsecond for the reset time (the time required to switch the material from the crystalline back to the amorphous state). The electrical energy required to switch these materials typically measured in the range of about a microjoule.
It should be noted that this amount of energy must be delivered to each of the memory elements in the solid state matrix of rows and columns of memory cells. Such high energy levels translate into high current carrying requirements for the address lines and for the cell isolation/address device associated with each discrete memory element. Taking into consideration these energy requirements, the choices of memory cell isolation elements for one skilled in the art would be limited to very large single crystal diode or transistor isolation devices, which would make the use of micron scale lithography and hence a high packing density of memory elements impossible. Thus, the low bit densities of matrix arrays made from this material would result in a high cost per megabyte of stored information.
By effectively narrowing the distinction in price and performance between archival, non-volatile mass memory and fast, volatile system memory, the memory elements of the present invention have the capability of allowing for the creation of a novel, non-hierarchal “universal memory system”. Essentially all of the memory in the system can be low cost, archival and fast. As compared to original Ovshinsky-type phase change electrical memories, the memory materials described herein provide over six orders of magnitude faster programming time (less than 30 nanoseconds) and use extremely low programming energy (less than 0.1 to 2 nanojoules) with demonstrated long term stability and cyclability (in excess of 10 trillion cycles). Also, experimental results indicate that additional reductions in element size can increase switching speeds and cycle life.
In general, development and optimization of the class of chalcogenide memory materials has not proceeded at the same rate as other types of solid state electrical memories that now have substantially faster switching times and substantially lower set and reset energies. These other forms of memories typically employ one or two solid state microelectronic circuit elements for each memory bit (as many as three or four transistors per bit) in some memory applications. The primary “non-volatile” memory elements in such solid state memories, such as EEPROM, are typically floating gate field effect transistor devices wh
Elms Richard
Energy Conversion Devices Inc.
Phung Anh
Schlazer Philip H.
Siskind Marvin S.
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