Multibit memory cell

Details Multibit memory cell Multibit memory cell

2008-04-01

2008-04-01

Phung, Anh (Department: 2824)

Static information storage and retrieval

Read/write circuit

C365S230030, C365S156000

Reexamination Certificate

active

07352633

ABSTRACT:
Provided are a method, system and device for storing multiple bits into a multibit memory cell. In the illustrated embodiment, each multibit memory cell is a “quadbit” cell capable of storing 4 bits which are read out on four bit lines of the cell in response to activation of a common word line. In the illustrated embodiment, the bit subcells of each cell are arranged in a 2 by 2 array in which two pairs of subcells are each aligned in a longitudinal direction . Conversely, each of two pairs of subcells are also aligned in a transverse direction. Additional embodiments are described and claimed.

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Hwang, J., “ROM/PROM/EPROM”,The VLSI Handbook, Sep. 30, © 2000 CRC Press LLC.

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