Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2003-10-23
2010-06-15
Liu, Shuwang (Department: 2611)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S294000, C375S355000, C375S371000, C375S373000, C375S374000, C375S376000
Reexamination Certificate
active
07738618
ABSTRACT:
The present invention relates to a multiband PLL arrangement comprising a single loop PLL with a phase/frequency detecting means (1), a loop filter means (2) and a Voltage Controlled Oscillator (VCO) (3), to which PLL a reference voltage signal (Vref) is input. It further comprises a control circuit for appropriately locking the VCO (3) to the correct frequency band, said control circuit comprising a multi-window circuit (4) with at least first and second window amplitudes each defined by respective upper and lower voltage levels, and comparing means (5A,5B) are provided for comparing a first VCO control voltage output from the loop filter means (2) with the upper and lower voltage levels of a first, broadest amplitude window. If the VCO control voltage settles within said first amplitude window, a narrower window is selected, the voltage levels of which are compared with the VCO control voltage and if the VCO control voltage settles within that or a further subsequent, smaller amplitude window, phase lock is achieved, otherwise, if the VCO control voltage does not settle within said windows, this is established by the comparing means (5A,5B), said comparing means (5A,5B) providing a signal for providing a second control signal to the VCO (3) for switching it to another, higher or lower, frequency band. For said other frequency band, the resulting first VCO control voltage signal is compared with said first amplitude window etc. until phase lock is achieved in the appropriate frequency band.
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Jacobsson Harald
Lopelli Emanuele
Liu Shuwang
Patel Dhaval
Potomac Patent Group PLLC
Telefonaktiebolaget L M Ericsson (publ)
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