Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1998-02-10
2001-08-07
Pham, Long (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S402000, C257S392000
Reexamination Certificate
active
06271572
ABSTRACT:
This application is based on a Japanese patent application No. 9-28132 filed on Feb. 12, 1997, the whole contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
a) Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing same, and more particularly, to a semiconductor device handling a plurality of voltage levels, and a method of manufacturing same.
b) Description of the Related Art
Drive voltages for semiconductor integrated circuits have tended to fall as savings in power consumption are made. For example, analogue circuits, such as a TTL, have been developed with a 5 V power source, but subsequently developed digital circuits are generally driven at 3.3 V. The drive power supply for digital circuits has been tending to fall even further, to 2.5 V. In memory devices, and the like, even more significant voltage reductions have been achieved. The signal level depends on the power supply voltage, such that, for example, the level is “1” when the voltage is 70% or above of the power supply voltage and it is “0” when the voltage is 30% or less.
Integrated circuit devices containing several types of functional circuit are sometimes required to handle a plurality of voltage levels. For the sake of convenience, such devices are known as multi-voltage level devices. These contain a high-voltage circuit driven by a relatively high-voltage power supply and a low-voltage circuit driven by a relatively low-voltage power supply.
In a metal-oxide-semiconductor (MOS) transistor, the source electrode is usually grounded and the power supply voltage is supplied to the drain electrode. The gate electrode can be supplied optionally with a ground potential or the power supply voltage. The gate oxide film must have a breakdown voltage corresponding to the power supply voltage in the vicinity of the source electrode and the drain electrode. In a multi-voltage level device, the low-voltage circuit and the high-voltage circuit have different voltage levels supplied to the gate electrode.
In certain types of multi-voltage level device, the gate oxide film differs in thickness in low-voltage circuit MOS transistors and high-voltage circuit MOS transistors. Low-voltage circuit MOS transistors have a thin gate oxide film and high-voltage circuit MOS transistors have a thick gate oxide film. By varying the thickness of the gate oxide film in this way depending on the power supply voltage, it is possible to use high-performance MOS transistors for both low-voltage circuits and high-voltage circuits. However, since the gate oxide films vary in thickness, it is necessary to provide separate gate oxide film forming processes. This increases the number of manufacturing steps, and hence causes manufacturing costs to increase.
If low-voltage circuits and high-voltage circuits are fabricated using gate oxide films of uniform thickness, then MOS transistors in low-voltage circuits will have the same thickness as MOS transistors in high-voltage circuits. A suitable thickness for high-voltage circuit gate oxide films will be unnecessarily thick for low-voltage circuits, and hence MOS transistor performance will decline.
As described above, if a low-voltage circuit and high-voltage circuit are fabricated in a multi-voltage level device using the same manufacturing process, the performance of the low-voltage circuit MOS transistors will decline.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a multi-voltage level device whereby increases in the number of manufacturing steps can be restricted and any decline in the performance of low-voltage circuit MOS transistors can be suppressed.
A further object of the present invention is to provide a method of manufacturing a semiconductor device comprising insulated gate electrodes having increased voltage tolerance in high-voltage circuit MOS transistors, which are fabricated by the same manufacturing process.
According to one aspect of this invention, there is provided a semiconductor device comprising a first MOS transistor driven at a first voltage and a second MOS transistor driven at a second voltage higher than the first voltage both formed on a same semiconductor substrate, wherein: the second MOS transistor driven at said relatively high voltage comprises: a first active region of a first conductivity type in said semiconductor substrate; a first gate oxide film formed on said first active region; and a first electrode formed on said first gate oxide film and doped at a first concentration with an impurity of a second conductivity type which is opposite to the first conductivity type; and the first MOS transistor driven at said relatively low voltage comprises: a second active region of a first conductivity type in said semiconductor substrate; a second gate oxide film formed on said second active region; and a second electrode formed on said second gate oxide film and doped at a second concentration higher than the first concentration with an impurity of the second conductivity type.
According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device comprising a plurality of MOS transistors comprising the steps of: preparing a semiconductor substrate having a plurality of active regions of a first conductivity type; forming first gate oxide films onto said plurality of active regions; forming an electrode layer onto said first gate oxide films; patterning said electrode layer to form gate electrode patterns onto each of said plurality of active regions; oxidizing the surface of said gate electrode patterns to form second gate oxide films which is integrated with said first gate oxide films, and gradually decrease in thickness from side walls of the gate electrode pattern towards a centre portion thereof; first doping said plurality of active regions at first concentration with an impurity of a second conductivity type which is opposite to said first conductivity type using said gate electrode pattern as a mask, to dope said gate electrode patterns and the active regions on either side thereof at low concentration; and second doping, while covering a portion of said plurality of active regions by a mask, remainder of the active regions at second concentration higher than the first concentration with an impurity of a second conductivity type, to dope the gate electrode patterns and the active regions on either side thereof at the second concentration in said remainder of the active regions.
It is possible to create a depletion layer in the gate electrode in high-voltage circuit MOS transistors on the channel side by reducing the doping of the impurity in the gate electrodes. By creating a depletion layer, the electric field applied to the gate oxide film in high-voltage circuit is decreased and hence the breakdown voltage is increased. Furthermore, by forming the gate oxide film more thickly at the edges thereof than in the central portion thereof, it is possible to increase the breakdown voltage in the edge regions of gate electrodes, where the electric field is concentrated.
In this way, it is possible to fabricate MOS transistors having different characteristics in a high-voltage circuit and a low-voltage circuit, without increasing the number of manufacturing steps.
It is also possible to fabricate MOS transistors having different breakdown voltages for gate insulating films, without varying the thickness of the gate oxide films. Therefore, it is possible to provide a multi-voltage level semiconductor device having superior characteristics.
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Coleman William David
Ostrolenk Faber Gerb & Soffen, LLP
Pham Long
Yamaha Corporation
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