Multi-valued or single strength signal detection in a...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C717S107000, C717S114000

Reexamination Certificate

active

10605747

ABSTRACT:
A method, module, and program product for detecting signal strengths in a hardware description language, such as Verilog, that does not provide for such detection. The method includes the steps of creating a wired net configuration that provides for a data input signal and a controlled reference signal; varying the controlled reference signal based on a desired signal strength to be detected; and comparing the input signal with the controlled reference signal to determine if the desired signal strength has been detected.

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