Multi-valued logic/memory cells and methods thereof

Details Multi-valued logic/memory cells and methods thereof Multi-valued logic/memory cells and methods thereof

2007-05-07

2009-06-16

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Systems using particular element

Semiconductive

C365S072000

Reexamination Certificate

active

07548455

ABSTRACT:
A memory cell and method for making a memory cell in accordance with embodiments of the present invention includes two or more tunnel diodes, a loading system, and a driving system. The two or more tunnel diodes are coupled together, the loading system is coupled to the tunnel diodes and the driving system is coupled to the tunnel diodes and the loading system. The driving system drives a sense node from the tunnel diodes, the loading system, and the driving system between at least three or more substantially stable logic states.

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