Multi-threshold-voltage integrated circuit having a...

Details Multi-threshold-voltage integrated circuit having a... Multi-threshold-voltage integrated circuit having a...

2006-07-18

2006-07-18

Lee, Thomas (Department: 2115)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C365S145000

Reexamination Certificate

active

07080270

ABSTRACT:
An integrated circuit has a sleep switch, provided between a first power line and a second power line, which is constituted by a transistor of a first threshold voltage, and which becomes non-conducting in a sleep mode, and further has a latch circuit, connected to the second power line, which is constituted by a transistor of a second threshold voltage which is lower than the first threshold voltage, and a ferroelectric capacitor for storing data held in the latch circuit in accordance with the polarization direction of a ferroelectric film thereof. The integrated circuit also comprises a control signal generating circuit which, when returning to an active mode from the sleep mode, generates a plate signal for driving a terminal of the ferroelectric capacitor to generate a voltage in the latch circuit in accordance with the polarization direction, and generates a sleep signal for causing the sleep switch to conduct to thereby activate the latch circuit following the driving of the ferroelectric capacitor.

REFERENCES:
patent: 5781062 (1998-07-01), Mashiko et al.
patent: 6900478 (2005-05-01), Miyagi
patent: 10-078836 (1998-03-01), None
patent: 2001-093275 (2001-04-01), None
patent: 2003203475 (2003-07-01), None
“Technology for a Low Power Consumption, High-Speed LSI” Realize Inc., pp. 60-74.
“A 512 Kbit low-voltage NV-SRAM with the size of a conventional SRAM” 2001 Symposium on VLSI Circuits Digest of Technical Papers.

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