Multi-threaded FIFO pool buffer and bus transfer control system

Details Multi-threaded FIFO pool buffer and bus transfer control system Multi-threaded FIFO pool buffer and bus transfer control system

1996-03-13

1998-07-21

Sheikh, Ayaz R.

39520061, 395309, G06F 1300

Patent

active

057846499

ABSTRACT:
A bus transfer control system manages the transfer of multiple asynchronous data streams through a buffer pool. The bus transfer control system includes a buffer pool having a plurality of memory blocks, wherein each memory block provides for the storage of a plurality of data bytes and a plurality of data transfer devices coupled to the buffer pool to allow the transfer of segments of one or more data streams to be transferred between the plurality of data tranfer devices through the buffer pool. A transfer controller maintains status information relating to the status of data in the memory blocks and includes control logic for repeatedly evaluating the status information and providing for the prioritied selection of a first data transfer device and a predetermined one of the memory blocks.

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