Electrical computers and digital processing systems: support – Computer power control
Reexamination Certificate
2011-03-08
2011-03-08
Lee, Thomas (Department: 2116)
Electrical computers and digital processing systems: support
Computer power control
Reexamination Certificate
active
07904736
ABSTRACT:
The invention relates to a multi-thread power gating control design, setting idle components into a sleep mode to reduce power consumption due to current leakage. Based on compiler techniques, the invention arranges predicted-power-gating instructions into every thread of a may-happen-in-parallel region. A predicted-power-on instruction determines whether the corresponding component has been powered on, and powers on the component when it has not been powered on yet. A predicted-power-off instruction determines whether the component is required in the rest of the may-happen-in-parallel region, and powers off the component when it is required later.
REFERENCES:
patent: 6035376 (2000-03-01), James
patent: 7111182 (2006-09-01), Gary
patent: 7380039 (2008-05-01), Miloushev et al.
patent: 2003/0204560 (2003-10-01), Chen et al.
patent: 2003/0226046 (2003-12-01), John
patent: 2007/0061808 (2007-03-01), Kumar et al.
patent: 2009/0007120 (2009-01-01), Fenger et al.
patent: 519599 (2003-02-01), None
patent: 200725391 (2007-07-01), None
Chuang Kuo Yu
Lee Jeng Kuen
Wu Chung-Hsien
You Yi-Ping
Industrial Technology Research Institute
Lee Thomas
National Tsing Hua Universitiy
Rehman Mohammed H
LandOfFree
Multi-thread power-gating control design does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multi-thread power-gating control design, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-thread power-gating control design will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2621521