Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2003-01-16
2004-09-28
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S296000
Reexamination Certificate
active
06798011
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a MOS varactor which can be adopted to ICs, especially to high-frequency ICs, and controls electrostatic capacity using voltages applied from a plurality of terminals.
BACKGROUND OF THE INVENTION
Voltage-controlled variable capacitors are capacitors which can control electrostatic capacity in accordance with an applied voltage, and also known as varactors. Varactors are manufactured by a CMOS process utilizing (1) voltage dependency of P-N junction diodes or (2) voltage dependency of MOS capacitors. Varactors utilizing (2) are specifically termed MOS varactors.
Varactors are widely used for control circuits and oscillators. For instance, radio frequency (RF) oscillators use varactors for adjusting an oscillatory frequency to a particular value. In the case of LC (inductor capacitor) oscillators which are kinds of the RF oscilators, an oscillatory frequency is typically determined by the equation below.
&ohgr;
O
=1
/{square root over (L×C)}
Thus, in an LC oscillator using a varactor, it is possible to control a frequency by changing a value C indicating electrostatic capacity. Here, the varactor is preferably arranged so as to be capable of controlling electrostatic capacity in a wide range. Moreover, it is preferable that the generation of a capacity component which influence on the operation of the oscillator is restrained. Adopting the varactor with the foregoing characteristics enables to control a frequency in a wide range by a control circuit and an oscillator.
Now, a conventional embodiment using a varactor is discussed below. For instance, a voltage controlled oscillator (VCO) adopts a discrete variable MOS varactor
121
with an arrangement illustrated in FIG.
12
(
a
) FIG.
12
(
a
) is a schematic view, illustrating a circuit diagram of a voltage controlled oscillator (VCO) using a discrete variable MOS varactor
121
for controlling an oscillatory frequency, and FIG.
12
(
b
) is a schematic view, illustrating a circuit diagram of the discrete variable MOS varactor
121
of the VCO. This embodiment is disclosed in A. A. Abidi, G. J. Pottie, and W. J. Kaiser, “Power-Conscious Design Of Wireless Circuits And Systems”, Proceedings of the IEEE, vol. 88, (No. 10), pp. 1528-1545, published in October 2000, and is a typical embodiment of a voltage controlled oscillator (VCO) using a banked MOS varactor.
According this arrangement, in the discrete variable MOS varactor
121
, a MOS capacitor
122
as illustrated in FIG.
12
(
c
), which is commonly connected to capacitors C,
2
C, and
4
C, receives a tuning voltage. In this arrangement, valid electrostatic capacity can be varied by changing this tuning voltage (bias voltage of an N-well). Further, the discrete variable MOS varactor
121
includes a plurality of capacitor banks and can change the frequency of the VCO in a discrete manner by switching on/off the transistor using control signals b
0
, b
1
, and b
2
.
FIG. 13
is a circuit diagram, illustrating a semiconductor variable capacitive element disclosed by Japanese Laid-Open Patent Application No. 62-179162/1987 (Tokukaisho 62-179162; published on Aug. 6, 1987). In this invention, a bias terminal
103
for applying a bias voltage to a capacitive electrode
112
from the outside is provided and this enables to control electrostatic capacity from the viewpoint of a capacitive terminal
105
so that it is possible to change the value of the electrostatic capacity by the bias voltage. Moreover, a voltage of a connected external circuit is cut off by bias-cut capacity
104
so that a low and constant bias voltage can be applied to the capacitive electrode
112
. With this arrangement, it is possible to prevent an unnecessary bias voltage from being applied to the capacitive electrode
112
so as to realize a reliable semiconductor variable capacitive element whose value of the electrostatic capacity does not change over time.
Incidentally, by connecting a capacitive terminal
105
in
FIG. 13
as an output terminal LO in FIG.
12
(
a
), it is possible to transform the semiconductor variable capacitive element in
FIG. 13
into the discrete variable MOS varactor
121
of the VCO in FIG.
12
(
a
).
It is noted that conventional MOS varactors can be operated by a typical process of CMOS ICs without adding a supplementary step to the process, and have such a characteristic that the adjustable range of electrostatic capacity is wider than that of diodes (P-N junction diodes).
However, since the MOS varactors have two terminals: (1) a gate and (2) a silicon well, it is difficult to adjust the fluctuations of electrical parameters, occurring in the process.
Moreover, since the circuit in FIG.
12
(
a
) adopts the plurality of capacitor banks as in the foregoing description, the frequency of the VCO is changed by the plurality of capacitor banks in a discrete manner so that it is not possible to change the frequency of the VCO in a progressive manner. Further, because of a switching transistor controlled by control signals b
0
, b
1
, and b
2
, a high series resistance is added and hence the performance index (Q-factor) of the VCO decreases. To compensate this decrease of the Q-factor, a very large switching transistor is needed and this causes the increase of the size of the whole arrangement.
In the meantime, the conventional example (Japanese Laid-Open Patent Application No. 62-179162/1987) in
FIG. 13
includes a bias terminal
103
for bias control, and is arranged in such a manner that a bias point moves along a C-Vc curve when the bias point is adjusted or selected. However, when the semiconductor variable capacitive element in
FIG. 13
is used for the VCO in a PLL (Phase Locked Loop) which is a closed loop, a sensitivity &Dgr;C/&Dgr;Vc, which influences on the operation of the VCO, is changed.
As described above, the conventional method using P-N junction diodes and MOS varactors has such a drawback that the controllable range of electrostatic capacity is limited and the sensitivity &Dgr;C/&Dgr;Vc, which is the ratio between an electrostatic capacity and a voltage, cannot be controlled.
SUMMARY OF THE INVENTION
The objective of the present invention is to provide a MOS varactor in which electrostatic capacity can be progressively changed and which enables to control a frequency and sensitivity when adopted to an oscillator.
To achieve the foregoing objective, the multi-terminal MOS varactor in accordance with the present invention comprises: a MOS capacitor including an impurity area formed on a well, a control terminal connected to the impurity area, and a floating electrode facing the well; and a plurality of capacitors each having two terminals, one terminal being connected to the floating electrode, and the other terminal being capable of receiving a control voltage.
According to this arrangement, the multi-terminal MOS varactor is arranged in such a manner that the floating electrode of the MOS capacitor is connected to one of two terminals of each of the plurality of capacitors, and the other terminals of the plurality of capacitors can receive control voltages. Thus, when the control voltages are applied to the other terminals of the plurality of capacitors and the control voltage is applied to the control terminal, it becomes possible to progressively change the electrostatic capacity, and hence the fluctuations generated on the occasion of fabricating can be compensated. Moreover, the arrangement makes it possible to fabricate a multi-terminal MOS varactor using a typical CMOS process, without adding a supplementary step.
For a fuller understanding of the nature and advantages of the invention, reference should be made to the ensuing detailed description taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 6621128 (2003-09-01), Lee et al.
patent: 62-179162 (1987-08-01), None
Abidi (“Power-conscious design of wireless circuits and systems,” Proceedings of the IEEE, Oct. 2000, vol. 8, Issue 10, p 1528-1545).*
Abidi et al, “Power-conscious design of wireless circuits and sy
Flynn Nathan J.
Quinto Kevin
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