Multi-step etch for metal bump formation

Details Multi-step etch for metal bump formation Multi-step etch for metal bump formation

2005-06-30

2008-09-23

Pham, Thanhha S. (Department: 2813)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S613000, C438S667000, C257SE21575

Reexamination Certificate

active

07427565

ABSTRACT:
The present invention uses a two step plasma etch process to create a via contact with an integral bump. After the via and bump have been plated, the semiconductor substrate is planarized to remove the excess metal, using the semiconductor substrate as a planar stop. The bulk silicon substrate surrounding the bumps are plasma etched back to expose the bumps for assembly.

REFERENCES:
patent: 6706622 (2004-03-01), McCormick
patent: 6716737 (2004-04-01), Plas et al.

Affiliated with

Also associated with

Rating

Multi-step etch for metal bump formation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-step etch for metal bump formation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-step etch for metal bump formation will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3983671