Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Patent
1999-03-18
2000-10-31
Smith, Matthew
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
438687, 205222, H01L 21302, H01L 21461
Patent
active
061402419
ABSTRACT:
A multi-step electrochemical method for forming a copper metallurgy on an integrated circuit which has high aspect ratio contact/via openings is described. The method is designed to give good coverage and gap filling capability as well as high production throughput by performing the electrochemical deposition of copper in two deposition stages with an dwell period between the stages. The process utilizes a copper plating electrolyte which contains an added brightener and leveler. The first deposition is done at a low current density which provides good coverage resulting from a high throwing power. The high aspect ratio contact/via openings are covered with a substantial thickness of a uniform, high quality copper coating. During the deposition, the concentration of brightener becomes depleted in the base region of high aspect ratio contacts or vias. The concentration of brighteners, is replenished in these regions by diffusion during a brief dwell period wherein the plating current is stopped. Next, a high current density is applied whereby the contact/vias are filled and additional copper is deposited over them at a high deposition rate. The greatest throughput benefits are realized, by way of the high current density step, when the process is applied to the formation of a dual damascene metallurgy.
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Shue Shau-Lin
Tsai Ming-Hsing
Tsai Wen-Jye
Yu Chen-Hua
Ackerman Stephen B.
Lee Calvin
Saile George O.
Smith Matthew
Taiwan Semiconductor Manufacturing Company
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