Multi-state memory

Details Multi-state memory Multi-state memory

2007-03-06

2007-03-06

Nguyen, Viet Q. (Department: 2827)

Static information storage and retrieval

Read/write circuit

C365S185030, C365S185200, C365S185210, C365S185220

Reexamination Certificate

active

10921450

ABSTRACT:
Maximized multi-state compaction and more tolerance in memory state behavior is achieved through a flexible, self-consistent and self-adapting mode of detection, covering a wide dynamic range. For high density multi-state encoding, this approach borders on full analog treatment, dictating analog techniques including A to D type conversion to reconstruct and process the data. In accordance with the teachings of this invention, the memory array is read with high fidelity, not to provide actual final digital data, but rather to provide raw data accurately reflecting the analog storage state, which information is sent to a memory controller for analysis and detection of the actual final digital data.

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