Static information storage and retrieval – Floating gate – Multiple values
Patent
1997-01-29
1998-04-14
Fears, Terrell W.
Static information storage and retrieval
Floating gate
Multiple values
365 45, 36518533, 36518528, G11C 1300
Patent
active
057401047
ABSTRACT:
A flash memory cell. The cell includes a transistor with a floating gate that is formed from a number of crystals of semiconductor material. The crystals are disposed in the gate oxide of the transistor. The size of the crystals and their distance from a surface of a semiconductor layer of the transistor are chosen such that the crystals can trap a single electron by hot electron injection. Each trapped electron causes a measurable change in the drain current of the transistor. Thus, multiple data bits can be stored and retrieved by counting the changes in the drain current.
REFERENCES:
patent: 5021999 (1991-06-01), Kohda et al.
patent: 5027171 (1991-06-01), Reedy et al.
patent: 5111430 (1992-05-01), Morie
patent: 5253196 (1993-10-01), Shimabukuro
patent: 5293560 (1994-03-01), Harari
patent: 5317535 (1994-05-01), Talreja et al.
patent: 5388069 (1995-02-01), Kokubo
patent: 5424993 (1995-06-01), Lee et al.
patent: 5430670 (1995-07-01), Rosenthal
patent: 5434815 (1995-07-01), Smarandoiu et al.
patent: 5438544 (1995-08-01), Makino
patent: 5467306 (1995-11-01), Kaya et al.
patent: 5477485 (1995-12-01), Bergemont et al.
patent: 5485422 (1996-01-01), Bauer et al.
patent: 5627781 (1997-05-01), Hayashi et al.
Alok, D., et al., "Electrical Properties of Thermal Oxide Grown on n-type 6H-Silicon Carbide", Appln. Phys. Lett., vol. 64, 2845-2846, (1994).
Yu, M. et al., "The Electronic Conduction Mechanism of Hydrogenated Nanocrystalline Silicon Films", Proc. 4th Int. Conf. on Solid-State and Int. Circuit Tech., 66-68, (Oct. 1995).
Bauer, M., et al., "A Multilevel-Cell 32 Mb Flash Memory", Digest IEEE, Solid-State Circuits Conf., 132-133, (1995).
Boeringer, D.W., et al., "Avalanche amplification of multiple resonant tunneling through parallel silicon microcrystallites", Physical Rev. B. vol. 51, 13 337-13 343, (1995).
Demichelis, F., et al., "Influence of Doping on the Structural and Optoelectronic Properties of Amorphous and Microcrystalline Silicon Carbide", J. Appl. Phys., vol. 72, 1327-1333, (1992).
Demichelis, F., et al., "Physical Properties of Doped and Undoped Microcrystalline SiC:H Deposited By PECVD", Symp. on Amorphous Silicon Technology, vol. 214, 413-418, (1991).
Dipert, B., et al., "Flash Memory Goes Mainstream", IEEE Spectrum, vol. 30, 48-52, (Oct. 1993).
Edelberg, E., et al., "Visible Luminescence from nanocrystalline silicon films produced by plasma enhanced chemical vapor deposition", Appl. Phys. Lett., vol. 68, 1415-1417, (Mar. 1996).
Hamakawa, y., et al., "Optoelectronics and Photovoltaic Applications of Microcrystalline SiC", Symp. Materials Issues in Microcrystalline Semi-Conductors, vol. 164, 291-302, (1989).
Hu, G., "Will Flash Memory Replace Hard Disk Drive?", IEEE Electron Devices Meeting, Session 24, 1 pg. (1994).
Hybertsen, M.S., "Absorption and Emission of Light in Nanoscale Silicon Structures", Phys. Rev. Lett., vol. 72, 1514-1517, (Mar. 1994).
Jung, T.S., et al., "A 3.3V, 128Mb Multi-Level NAND Flash Memory for Mass Storage Applications", IEEE, 4 pgs., (1996).
Kamata, T., et al., "Substrate Current Due to Impact Ionization in MOS-FET", Japan. J. Appl. Phys., vol. 15, 1127-1133, (Jun. 1976).
Kato, M., et al., "Read-Disturb Degradation Mechanism due to Electron Trapping in the Tunnel Oxide for Low-voltage Flash Memories", IEEE, 45-48, (1994).
Ohkawa, M., et al., "A 98 mm 3.3V 64Mb Flash Memory with FN-NOR type 4-Level Cell", IEEE, 4 pgs., (1996).
Prendergast, J., "FLASH or DRAM: Memory Choice for the Future", IEEE Electron Device Meeting, Session 25, (1995).
Schoenfeld, O., et al., "Formation of Si Quantum dots in Nanocrystalline silicon", Solid-State Electronics, 605-608, (Jul. 1995).
Shimabukuro, R.L., et al., "Circuitry for Artificial Neural Networks with Non-volatile Analog Memories", Electronic Letters, vol. 2, 1217-1220, (1989).
Shimabukuro, R.L., et al., "Dual-Polarity Nonvolatile MOS Analogue Memory (MAM) Cell for Neural-Type Circuitry", IEEE, vol. 24, 1231-1232, (Sep. 15, 1988).
Suh, K.D., et al., "A 3.3 V 32 Mb NAND Flash Memory with Incremental Step Pulse Programming Scheme", IEEE, vol. 30, 1149-1156, (Nov. 1995).
Sze, S.M., Physics of Semiconductor Devices, "Multiplication and Oxide Charging", Wiley-Interscience 2d Ed., 480-486 (1981).
Takeuchi, K., et al., "A Double-Level-Vth Select Gate Array Architecture for Multilevel NAND Flash Memories", IEEE Journal of Solid-State Circuits, vol. 31, 602-609, (Apr. 1996).
Tiwari, S., et al., "A silicon nanocrystal based memory", Appl. Physics Lett., vol. 68, 1377-1379, (Mar. 1996).
Tiwari, S., et al., "Volatile and Non-Volatile Memories in Silicon with Nano-Crystal Storage", IEEE Technical Digest, 521-524, (1995).
Tsu, R., et al., "Slow conductance oscillations in nanoscale silicon clusters of quantum dots", Appl. Phys. Lett., vol. 65, 842-844, (1994).
Tsu, R., et al., "Tunneling in Nanoscale Silicon Particles Embedded in an a-SiO/sub/2 Matrix", Abstract, IEEE Devices Research Conference, 178-179, (1996).
Ye, Q., et al., "Resonant tunneling via microcrystalline-silicon quantum confinement", Physical Rev. B., vol. 44, 1806-1811, (1991).
Yih, C.M., et al., "A Consistent Gate and Substrate Current Model for Sub-Micron MOSFET'S by Considering Energy Transport", Int'l Symp. on VLSI Tech., Systems and Applic., 127-130, (1995).
Zhao, X., et al., "Nanocrystalline Si: a material constructed by Si quantum dots", Materials Science and Engineering, 467-471, (1995).
Fears Terrell W.
Micro)n Technology, Inc.
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