Multi-stage interconnect architecture for complex...

Details Multi-stage interconnect architecture for complex... Multi-stage interconnect architecture for complex...

2005-03-08

2005-03-08

Tokar, Michael (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S040000, C326S039000

Reexamination Certificate

active

06864713

ABSTRACT:
Systems and methods are disclosed for providing a multi-stage interconnect architecture, such as for high density and high performance complex programmable logic devices. As an example, a first stage of a two-stage interconnect architecture programmably routes signals from a global routing structure to a second stage of the two-stage interconnect architecture. The second stage routes signals from the first stage to a number of logic blocks. The second stage also-optionally routes feedback signals from the logic blocks along with signals from associated I/O terminals back to the logic blocks to provide local feedback capability.

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ispMACH 4000V/B/C/Z Family Data Sheet, Lattice Semiconductor Corporation, 2003, pp. 1-82 Mar. 2003.

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