Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-11-29
2005-11-29
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S654000, C438S683000
Reexamination Certificate
active
06969678
ABSTRACT:
A method of forming an integrated circuit, and an integrated circuit, are provided. A gate dielectric is formed on a semiconductor substrate, and a gate is formed over the gate dielectric. A sidewall spacer is formed around the gate and a source/drain junction is formed in the semiconductor substrate using the sidewall spacer. A bottom silicide metal is deposited on the source/drain junction and then a top silicide metal is deposited on the bottom silicide metal. The bottom and top silicide metals are formed into their silicides. A dielectric layer is deposited above the semiconductor substrate and a contact is formed in the dielectric layer to the top silicide.
REFERENCES:
patent: 5646070 (1997-07-01), Chung
patent: 6468900 (2002-10-01), Bertrand et al.
patent: 6806157 (2004-10-01), Yang et al.
Besser Paul R.
Chan Simon Siu-Sing
Chiu Robert J.
Frenkel Austin C.
Kammler Thorsten
Advanced Micro Devices , Inc.
Ishimaru Mikio
Lebentritt Michael
Lindsay Jr. Walter L.
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