Multi read port bit line

Static information storage and retrieval – Read/write circuit – Differential sensing

Reexamination Certificate

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Details

C365S154000, C365S185030, C365S185210, C365S230050

Reexamination Certificate

active

07099219

ABSTRACT:
In some embodiment, a circuit is provided that comprises a bit line and bit cells coupled to the bit line. The bit line has an impedance. The bit cells, when operated, are each capable of adjusting the bit line impedance to indicate a stored bit value and a selected one of at least two read ports. Other embodiments are described or otherwise claimed herein.

REFERENCES:
patent: 5552728 (1996-09-01), Lin
patent: 6414520 (2002-07-01), Dupcak et al.
patent: 6714455 (2004-03-01), Banks
patent: 6847569 (2005-01-01), Sinha et al.
patent: 6961266 (2005-11-01), Chang
patent: 2002/0186312 (2002-12-01), Stark
Igor Arsovski, “High-Speed Low-Power Sense Amplifier Design,” reading assignment for Analog Electronics, Course No. ECE1352, University of Toronto, 14 pages, Nov. 12, 2001.

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