Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2004-07-06
2008-08-26
Nguyen, Hiep T (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
Reexamination Certificate
active
07418551
ABSTRACT:
A technique to use available register cache resources if register file resources are unavailable. Embodiments of the invention pertain to a register cache writeback algorithm for storing writeback data to a register cache if register file write ports or space is unavailable.
REFERENCES:
patent: 2002/0066083 (2002-05-01), Patel et al.
patent: 2005/0138297 (2005-06-01), Sodani et al.
Black Bryan P.
Brekelbaum Edward A.
DeVale John P.
Rupley, II Jeffrey P.
Intel Corporation
Metzger Erik M.
Nguyen Hiep T
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