Multi-processor system having data coherency

Details Multi-processor system having data coherency Multi-processor system having data coherency

2006-07-04

2006-07-04

Padmanabhan, Mano (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S150000, C711S163000

Reexamination Certificate

active

07073031

ABSTRACT:
A system for maintaining data coherency. The system includes a plurality of processors. A plurality of resources is also included. One portion of the resources is sharable with the plurality of processors and each one of the other ones of the resources being dedicated to a predetermined one of the processors. The system also includes a plurality of buffers. Each one of the buffers is associated with a corresponding one of the plurality of processors. Each one of the buffers is adapted to successively store information presented thereto in successive locations of such one of the buffers. The information includes requests from the corresponding one of the processor. The system includes a logic section responsive to each one of the requests provided by the plurality of processors. The logic section produces indicia indicating whether or not such one of the requests is a request for an operation with one of the sharable resources. The logic section inserts the indicia into a succeeding one of the locations of the buffers associated with such one of the processor providing such one of the requests. The logic section also simultaneously inserts such indicia into a next succeeding available location of the other ones of the plurality of buffers. The logic section inhibits execution of requests in the buffers stored in locations thereof succeeding the location having stored therein any such inserted indicia.

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Optimizing Parallel Programs with Explicit Synchronization. by Arvind Krishnamurthy et al. 1995 ACM 0-89791-697-2/95/0006.

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