Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration
Reexamination Certificate
2006-12-05
2010-06-08
Cao, Chun (Department: 2115)
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
C713S100000
Reexamination Certificate
active
07734903
ABSTRACT:
Provided are a microprocessor suitable for constructing a multi-processor system and a method for controlling the reset and processor ID of the microprocessor. The microprocessor includes decoder receiving a reset ID having a predetermined binary value and a reset signal and decoding the reset ID, an ID generator receiving the decoding result of the decoder and generating at least one microprocessor ID and a reset ID of a microprocessor serially connected to the microprocessor, and a reset vector unit selecting a reset vector according to the decoding result of the decoder. The multi-processor system is constructed such that independent microprocessors of the system respectively generate their own reset vectors and processor IDs when a reset signal is input to the multi-processor system to initialize it. Thus, all the microprocessors of the system can be simultaneously started up when the reset signal is disabled. Accordingly, a resetting process in the multi-processor system is simplified, a period of time required for starting up the microprocessor is reduced, and the multi-processor system is easily designed.
REFERENCES:
patent: 5497497 (1996-03-01), Miller et al.
patent: 5729675 (1998-03-01), Miller et al.
patent: 6314515 (2001-11-01), Miller et al.
patent: 6401197 (2002-06-01), Kondo
patent: 7246222 (2007-07-01), Chheda et al.
patent: 2004/0210750 (2004-10-01), Chheda et al.
patent: 2005/0235166 (2005-10-01), England et al.
patent: 11-031068 (1999-02-01), None
patent: 10-0201399 (1999-03-01), None
Kim Myung Joon
Kim Seong Woon
Kim Sung Nam
Kim Young Woo
Park Kyoung
Cao Chun
Electronics and Telecommunications Research Institute
Ladas & Parry LLP
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