Multi-processor system

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation

Reexamination Certificate

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Details

C700S003000

Reexamination Certificate

active

07836233

ABSTRACT:
A serial communication interface (SCI) cable4is provided between the slave processor2and the master processor3. Both processors are connected with a communication interface for peripheral units (SPI: Serial Peripheral Interface) which enables fast transmission. The slave processor2transmits a transmission request command which requests at least one of data transmission and reception from the command communication section220to the master processor3through the SCI cable4. The master processor3transfers data to and from the slave processor2in communication with the slave processor2by means of the data communication section310through the fast SPI cable5in response to a transmission request command sent from the slave processor2With this, the processing ability of a multi-processor system can be increased.

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patent: 5737630 (1998-04-01), Kobayashi
patent: 5878234 (1999-03-01), Dutkiewicz et al.
patent: 7020790 (2006-03-01), Mares
patent: 2002/0120795 (2002-08-01), Charlier
patent: 2004/0039866 (2004-02-01), Cheung
patent: 2009/0024776 (2009-01-01), Cheung et al.
patent: 09293047 (1997-11-01), None

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