Multi-processor switch and main processor switching method

Details Multi-processor switch and main processor switching method Multi-processor switch and main processor switching method

1999-06-07

2002-12-31

Badesman, Scott (Department: 2184)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

Reexamination Certificate

active

06502206

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a multi-processor switch having one main processor and a plurality of co-processors, and in particular to a method for, when a failure occurs at the main processor, switching the processor performing the main processor functions from the main processor to one of the co-processors.
2. Related Arts
FIG. 14
is a schematic block diagram illustrating a conventional multi-processor switch. Of the plurality of processors included in the multi-processor switch (hereinafter referred to simply as a switch), one processor, the main processor (hereinafter referred to simply as the MPR), determines overall operations performed by the switch and controls co-processors which will be described next, but does not itself perform calling processes. Instead, calling processes are performed by co-processors (hereinafter referred to simply as CPRs) based on the control by MPR. A plurality of CPR (CPR#
0
, #
1
, #
2
, . . . ) are generally provided in order to distribute the load imposed by the need to perform calling processes for many subscriber terminals connected to the switch, or for another switch. A storage device (a hard disk unit (HDU)) is provided for each of MPR and the CPRs.
In
FIG. 14
, an SP device
101
is a line device for terminating a line connected to a terminal (e.g., a telephone) which transmits an audio signal. A signal device
102
is a line device for terminating a line connected to a terminal (e.g., a facsimile machine) that transmits data which is not accompanied by an audio signal. And a relay device
103
is a line device for terminating a line connected to another switch. These line devices are connected to the MPR and the CPRs via a bus
100
.
It is assumed that during the operation of a switch, the MPR will at some time and for some reason malfunction. And since at such a time overall control of all switch operations, including the control provided for the CPRs by the MPR, is lost, all calling operations being processed by the switch would be halted, even though the CPRs performing those operations would still be capable of functioning normally. The result in this case would be the occurrence of a so-called system shutdown, to recover from which an operator must conventionally perform a manual operation using a maintenance terminal
110
, as shown in FIG.
14
.
In order to avoid a system shutdown, according to one conventional method the MPR functions are assigned to a CPR which is selected in advance, so that should a failure occur at the MPR, the selected CPR will begin to perform the MPR functions.
However, if a CPR is selected in advance to perform the MPR functions when a malfunction occurs at the MPR, the following problem may be encountered.
Avoidance of a system shutdown will not be possible if the selected CPR is also broken down. And if the selected CPR is unstable and tends to be broken down due to a specific reason, a system failure involving the selected CPR can occur when responsibility for the performance of the MPR functions is shifted to it. In addition, when the load imposed on the selected CPR is greater than the loads imposed on the other CPRs, overloading of the selected CPR will occur when it has to perform the MPR functions. This condition will result in the deterioration of the capabilities of the selected CPR and in the instability of the overall operation of the switch.
SUMMARY OF THE INVENTION
It is, therefore, one objective of the present invention to provide a multi-processor switch which, when a failure occurs at a main processor, selects an appropriate co-processor and permits it to function as the main processor, and a main processor switching method therefor.
To achieve the above objective, according to the present invention, it is provided a multi-processor switch comprising:
a main processor;
a plurality of co-processors for performing a calling process under the control of the main processor;
a detection unit for detecting a failure at the main processor; and
a determination unit for determining a replacement processor for performing the main processor functions from among the co-processors based on the operating state of each co-processor when the failure at the main processor is detected by the detection unit.
Also, to achieve the above objective, according to the present invention it is provided a main processor switching method for a multi-processor switch including a main processor and a plurality of co-processors for performing calling processes under the control of the main processor, comprising the steps of:
detecting a failure at a main processor;
determining a replacement processor for performing the main processor functions from among the co-processors based on the operating state of the co-processors; and
performing the main processor functions by the replacement processor.
The operating state of each of the co-processors is, for example, the load state imposed on the co-processor or the number of times its operation has been resumed, or a combination of the two. By selecting a co-processor as the replacement processor which has a small load or which has been resumed less frequently, an appropriate, more stable replacement processor can be determined.


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