Multi-port system for communication between processing elements

Static information storage and retrieval – Addressing – Multiple port access

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S191000, C365S189011, C711S149000, C370S464000

Reexamination Certificate

active

07359276

ABSTRACT:
An aspect of the invention relates to communication between a first processing element and a second processing element. A first-in-first-out circuit (FIFO) includes a data input port, a data output port, an object-sent port, an object-end port, a memory, and control logic. The data input port is coupled to the first processing element. The data output port is coupled to the second processing element. The object-sent port is configured to receive an object-sent signal from the first processing element. The object-end port is configured to send an object-end signal to the second processing element. The memory is configured to store objects, each of the objects include a plurality of data words. The control logic is configured to control reading and writing to the memory, processing the object sent signal, and generating the object end signal.

REFERENCES:
patent: 4119961 (1978-10-01), Rockett, Jr.
patent: 4942553 (1990-07-01), Dalrymple et al.
patent: 5325487 (1994-06-01), Au et al.
patent: 5426756 (1995-06-01), Shyi et al.
patent: 5506809 (1996-04-01), Csoppenszky et al.
patent: 5557750 (1996-09-01), Moore et al.
patent: 5754614 (1998-05-01), Wingen
patent: 5898893 (1999-04-01), Alfke
patent: 6041370 (2000-03-01), Guyt
patent: 6097656 (2000-08-01), Kim
patent: 6154772 (2000-11-01), Dunn et al.
patent: 6208666 (2001-03-01), Lawrence et al.
patent: 6208703 (2001-03-01), Cavanna et al.
patent: 6308249 (2001-10-01), Okazawa
patent: 6314154 (2001-11-01), Pontius
patent: 6337809 (2002-01-01), Kim et al.
patent: 6337893 (2002-01-01), Pontius
patent: 6366529 (2002-04-01), Williams et al.
patent: 6366530 (2002-04-01), Sluiter et al.
patent: 6389029 (2002-05-01), McAlear
patent: 6389490 (2002-05-01), Camilleri et al.
patent: 6401148 (2002-06-01), Camilleri
patent: 6405269 (2002-06-01), Ebeling et al.
patent: 6434642 (2002-08-01), Camilleri et al.
patent: 6606701 (2003-08-01), Tsubota
patent: 6721864 (2004-04-01), Keskar et al.
patent: 6801143 (2004-10-01), Oberai et al.
patent: 6838902 (2005-01-01), Elfmann et al.
patent: 6934198 (2005-08-01), Lowe et al.
patent: 6937172 (2005-08-01), Lowe et al.
patent: 6956776 (2005-10-01), Lowe et al.
patent: 7161849 (2007-01-01), Lowe et al.
patent: 7254677 (2007-08-01), Lowe et al.
patent: 2005/0232151 (2005-10-01), Chapweske et al.
Gordon Brebner; XAPP655; Application Note entitled Mixed-Version IP Rouiter (MIR); (v1.2) Oct. 13, 2004; available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124; pp. 1-18.
Wen Ying Wei et al.; XAPP691; Application Note entitled Parameterizable LocalLink FIFO; (v1.2) Feb. 2, 2004; available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124; pp. 1-30.
Clifford E. Cummings and Peter Alfke; “Simulation and Synthesis Techniques for Asynchronous FIFO Design with Asynchronous Pointer Comparisons”; Re 1.1; SNUG San Jose 2002; pp. 1-18.
Xilinx, Inc.; “170 MHz FIFOs Using the Virtex Block SelectRAM+ Feature”; XAPP131 (v 1.7); Mar. 26, 2003; available from Xilinx, 2100 Logic Drive, San Jose, California 95124; pp. 1-7.
Xilinx, Inc.; “Synchronous and Asynchronous FIFO Designs”; XAPP 051 (Version 2.0); Sep. 17, 1996; available from Xilinx, 2100 Logic Drive, San Jose, California 95124; pp. 1-12.
Xilinx, Inc.; “Asynchronous FIFO in Virtex-II FPGA's”; TechXclusives; downloaded Apr. 12, 2004 from http:// support.xilinx.com/xlnx/xweb/sil—tx—printfriendly.jsp?BV—SessionID=@@@@116. . .; pp. 1-3.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Multi-port system for communication between processing elements does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-port system for communication between processing elements, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-port system for communication between processing elements will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2794741

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.