Static information storage and retrieval – Addressing – Multiple port access
Patent
1996-09-19
1998-04-21
Nelms, David C.
Static information storage and retrieval
Addressing
Multiple port access
36518404, 365154, 365201, G11C 800, G11C 700
Patent
active
057425574
ABSTRACT:
Disclosed is an architecture of a RAM (random access memory) with BIST (built-in self test) or functional test function. The RAM has a memory cell for storing differential or single-ended binary data and bit line signals are fully differential or single-ended. Shadow write is applied to read only and read-write bit lines. With the test function, port-to-port bit line shorts and port-to-port word line shorts are sensitized.
REFERENCES:
patent: 5384734 (1995-01-01), Tsujihashi et al.
patent: 5398047 (1995-03-01), Nara et al.
patent: 5493536 (1996-02-01), Aoki
patent: 5590087 (1996-12-01), Chung et al.
Silburt, A.L., et al, "A 180-Mhz 0.8-um BiCMOS Modular Memory Family of DRAM and Multiport SRAM", IEEE Journal of Solid-State Circuits, vol. 28, No. 3, Mar. 1993, pp. 222-232.
NADEAU-DOSTIE, B., et al., "Serial Interfacing for Embedded-Memory Testing", IEEE Design & Test of Computers, Apr. 1990, pp. 52-63.
Gibbins Robert George
Gibson Garnet Frederick Randall
Wood Steven William
de Wilton Angela C.
Hoang Huan
Nelms David C.
Northern Telecom Limited
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