Multi-port memory emulation using tag registers

Static information storage and retrieval – Read/write circuit – Simultaneous operations

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Details

36523003, 36523008, G11C 1300

Patent

active

055638295

ABSTRACT:
A method of implementing a multi-port memory circuit in the memory resources of configuration logic blocks of programmable logic devices. The multi-port memory circuit to be implemented comprises a memory array having memory locations for storing data, read ports for reading data from the memory array and write ports for writing data to the memory array. Multiple duplications of the memory array are created in order to implement as many read ports and write ports as the multi-port memory circuit being implemented. The memory locations within the duplicate memory arrays are tagged to indicate which memory location had data written therein last so that only the last written data will be read through the various read ports.

REFERENCES:
patent: 4831591 (1989-05-01), Imazeki

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