Static information storage and retrieval – Read/write circuit – Simultaneous operations
Patent
1994-10-14
1996-02-06
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Simultaneous operations
36523005, 36523009, 365239, G11C 700, G11C 800
Patent
active
054901120
ABSTRACT:
A multi-port memory device includes a row-column array, a random access port, a plurality of bidirectional serial access memory (SAM) ports, and a switching network for coupling SAM ports to sets of columns. A column is defined as a number of memory cells sharing a sense amplifier. Sets of columns are defined in one rectangular region or among several rectangular regions of the array. The switching network selectively couples each SAM port with each set, each set with each other set, and each SAM port with each other SAM port. A video random access memory (VRAM) or a multi-port dynamic random access memory (DRAM) of the present invention provides increased flexibility in smaller die area.
REFERENCES:
patent: 4825411 (1989-04-01), Hamano
patent: 4851834 (1989-07-01), Stockebrand et al.
patent: 4855959 (1989-08-01), Kobayashi
patent: 4891794 (1990-01-01), Hush et al.
patent: 5065369 (1991-11-01), Toda
patent: 5121360 (1992-06-01), West et al.
patent: 5247484 (1993-09-01), Watanabe
patent: 5265049 (1993-11-01), Takasugi
patent: 5381376 (1995-01-01), Kim et al.
patent: 5418745 (1995-05-01), Watanabe
Casper Stephen L.
Hush Glen E.
Hoang Huan
Micro)n Technology, Inc.
Nelms David C.
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