Multi-port memory cell and access method

Details Multi-port memory cell and access method Multi-port memory cell and access method

2006-09-26

2006-09-26

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Addressing

Multiple port access

C365S154000

Reexamination Certificate

active

07113445

ABSTRACT:
A multi-port memory cell (200) can be formed from seven transistors. Single ended write operations can be performed without a boosted word line voltage or variable power supply. A data value (D/DB) stored in the memory cell (200) can be cleared by shorting complementary data nodes (204-0and204-1) together. Write data can then be placed on a bit line. Complementary data nodes (204-0and204-1) can then be isolated once again, resulting in the write data being latched within the memory cell (300). An access method (700) for a multi-port memory cell is also described.

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