Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2006-05-01
2008-11-04
Auve, Glenn A (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S306000, C710S315000
Reexamination Certificate
active
07447827
ABSTRACT:
A bridge device electrically connected to a first AGP bus, a second AGP bus, and a PCI bus is provided. The bridge device has a first bridge, a second bridge, and a controller. The first bridge is electrically connected between the first AGP bus and the second AGP bus. The second bridge is electrically connected between the first AGP bus and the PCI bus. The controller is electrically connected to the first AGP bus, the first bridge, and the second bridge. As a configuration cycle corresponding to the first bridge being transmitted through the first AGP bus to the controller, the controller responds a preset message implying that the first bridge does not exist.
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patent: 6523082 (2003-02-01), Yoshida
patent: 6898740 (2005-05-01), Olarig
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patent: 2005/0193172 (2005-09-01), Mukker et al.
Accelerated Graphics Port Interface Specification, Revision 2.0; Intel Corporation; May 4, 1998; pp. 1-10 and 243-255.
Chen Jen-Chieh
Ho Kuan-Jui
Auve Glenn A
Birch & Stewart Kolasch & Birch, LLP
VIA Technologies Inc.
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