Multi-port arbitration for high performance width expansion

Details Multi-port arbitration for high performance width expansion Multi-port arbitration for high performance width expansion

1996-07-31

1998-06-16

Nelms, David C.

Static information storage and retrieval

Addressing

Multiple port access

36518904, 365195, 365196, G11C 800

Patent

active

057682119

ABSTRACT:
A multi-port memory device comprising a memory cell coupled to a first port and a second port. The second port receives write data for writing into the memory cell. The multi-port memory device further comprises an undo circuit coupled to the memory cell. The undo circuit invalidates the write data in response to receiving a busy signal. When the undo circuit invalidates the write data, the write data is not written into the memory cell. The busy signal indicates that the first port is enabled to access the memory cell at substantially the same time that the second port receives the write data. The busy signal may be generated by arbitration circuitry in the multi-port memory device or by arbitration circuitry in another device coupled to the multi-port memory device. For one embodiment, the busy signal may be generated by arbitration circuitry in a second multi-port memory device coupled in width expansion with the first multi-port memory device.

REFERENCES:
patent: 5289427 (1994-02-01), Nicholes et al.
patent: 5398211 (1995-03-01), Willenz et al.
patent: 5459851 (1995-10-01), Nakajima et al.
"16K.times.8/9 Dual-Port Static RAM with Sem, Int, Busy", Cypress Semiconductor Data Book, pp. 6:1-17, May 1995.
"4K.times.16/18 and 8K.times.16/18 Dual-Port Static RAM with Sem, Int, Busy", Cypress Semiconductor Data Book, pp. 18-36, May 1995.
"1K.times.8 Dual-Port Static RAM", Cypress Semiconductor Data Book, pp. 6:37-49, May 1995.
"2K.times.8 Dual-Port Static RAM", Cypress Semiconductor Data Book, pp. 6:50-62, May 1995.
"2K.times.16 Dual-Port Static RAM", Cypress Semiconductor Data Book, pp. 6:63-73, May 1995.
"4K.times.8 Dual-Port Static RAMs and 4K.times.8 Dual-Port Static RAM with Semaphores", Cypress Semiconductor Data Book, pp. 6:74-86, May 1995.
"4K.times.8/9 Dual-Port Static RAM with Sem, Int, Busy", Cypress Semiconductor Data Book, pp.6:87-102, May 1995.
"8K.times.8/9 Dual-Port Static RAM with Sem, Int, Busy", Cypress Semiconductor Data Book, pp. 6:103-120, May 1995.

Affiliated with

Also associated with

Rating

Multi-port arbitration for high performance width expansion does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-port arbitration for high performance width expansion, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-port arbitration for high performance width expansion will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1734221