Multi-path data synchronizer system and method

Details Multi-path data synchronizer system and method Multi-path data synchronizer system and method

1994-04-06

1996-04-16

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

370108, 371 1, 375375, H04L 700, H04L 2536, H04L 2540

Patent

active

055090389

ABSTRACT:
A system and method for transferring data between clock domains operating at substantially the same frequency continuously compares the phase relationship of the clocks of the two domains and retains the current state of comparison at the start of a transfer of a block or frame of data for determining along which one of multiple data paths within the synchronizing circuit the transfer of the data frame will take place. Several data paths with different delays (at least two) transfer the data frame and clock signals. A phase comparator responds to the phase relationship between clocks attaining a value within one or another range of values at the start of a data frame to determine which one of the multiple data paths transfers the data frame.

REFERENCES:
patent: 4573173 (1986-02-01), Yoshida
patent: 4890303 (1989-12-01), Bader
patent: 5022056 (1991-06-01), Henderson et al.

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