Multi-module simultaneous program, erase test, and...

Details Multi-module simultaneous program, erase test, and... Multi-module simultaneous program, erase test, and...

2011-06-14

2011-06-14

Elmore, Reba I (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C714S718000, C714S719000, C365S104000, C365S185290, C365S185300

Reexamination Certificate

active

07962682

ABSTRACT:
Methods and apparatus for accessing modules on a flash memory package concurrently during testing are disclosed. According to one aspect of the present invention, a memory device for storing data includes a plurality of modules and a logic block. The plurality of modules each include a plurality of storage elements that hold the data. The logic block is arranged to enable the plurality of modules to be accessed in parallel, and is also arranged to enable the plurality of modules to be accessed serially.

REFERENCES:
patent: 5379401 (1995-01-01), Robinson et al.
patent: 5428566 (1995-06-01), Robinson
patent: 5430859 (1995-07-01), Norman et al.
patent: 5522087 (1996-05-01), Hsiang
patent: 5557573 (1996-09-01), McClure
patent: 5623214 (1997-04-01), Pasiecznik, Jr.
patent: 5663901 (1997-09-01), Wallace et al.
patent: 5675546 (1997-10-01), Leung
patent: 5760643 (1998-06-01), Whetsel
patent: 5848026 (1998-12-01), Ramamurthy et al.
patent: 5867507 (1999-02-01), Beebe et al.
patent: 6067262 (2000-05-01), Irrinki et al.
patent: 6072719 (2000-06-01), Tanzawa et al.
patent: 6128219 (2000-10-01), Pio et al.
patent: 6226766 (2001-05-01), Harward
patent: 6233184 (2001-05-01), Barth et al.
patent: 6243839 (2001-06-01), Roohparvar
patent: 6272655 (2001-08-01), Hecht et al.
patent: 6282145 (2001-08-01), Tran et al.
patent: 6546505 (2003-04-01), Swoboda et al.
patent: 6549469 (2003-04-01), Gochi
patent: 6643725 (2003-11-01), Kozakai et al.
patent: 6649931 (2003-11-01), Honma et al.
patent: 6651202 (2003-11-01), Phan
patent: 7127550 (2006-10-01), Lin
patent: 7493541 (2009-02-01), Agrawal et al.
patent: 2002/0116668 (2002-08-01), Chhor et al.
patent: 0 681 295 (1995-11-01), None
US Office Action dated Oct. 4, 2004 issued in U.S. Appl. No. 10,000,828 (7,127,550).
Final US Office Action dated Jan. 24, 2005 issued in U.S. Appl. No. 10,000,828 (7,127,550).
US Office Action dated Jul. 20, 2005 issued in U.S. Appl. No. 10,000,828 (7,127,550).
Final US Office Action dated Jan. 13, 2006 issued in U.S. Appl. No. 10,000,828 (7,127,550).
Notice of Allowance and Allowed Claims dated Jun. 21, 2006 issued in U.S. Appl. No. 10,000,828 (7,127,550).

Affiliated with

Also associated with

Rating

Multi-module simultaneous program, erase test, and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-module simultaneous program, erase test, and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-module simultaneous program, erase test, and... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2633202