Multi-master extended I2C protocol

Details Multi-master extended I2C protocol Multi-master extended I2C protocol

2006-10-03

2006-10-03

Dang, Khanh (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

C710S105000

Reexamination Certificate

active

07117283

ABSTRACT:
An extended protocol provides a serial bus with the capability of effective communications for a multimaster bus. A bus device may enter a master mode and transmit information identifying a designated recipient device on the bus. Either the master mode device or the designated recipient device may send information that identifies the master mode bus device. The master mode device may read from the designated recipient device or may write to the designated recipient device. The designated recipient device may provide an acknowledgement, data, a command, or status information may be sent back. The status information may include version information regarding the hardware, software, and/or firmware of the designated recipient device.

REFERENCES:
patent: 5444847 (1995-08-01), Iitsuka
patent: 5758098 (1998-05-01), Townsley et al.
patent: 6049893 (2000-04-01), Liddell et al.
patent: 6457078 (2002-09-01), Magro et al.
patent: 6745270 (2004-06-01), Barenys et al.
I2C Bus Specification, Ver. 2.1, Jan. 2000.

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