Multi-layer wiring board substrate and semiconductor device...

Details Multi-layer wiring board substrate and semiconductor device... Multi-layer wiring board substrate and semiconductor device...

2001-06-14

2003-02-11

Nelms, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S759000, C257S760000

Reexamination Certificate

active

06518672

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a multi-layered wiring substrate and a semiconductor device using a multi-layered wiring substrate.
2. Description of the Related Art
The structure of a conventional multi-layered wiring substrate used with a semiconductor package and a method for manufacturing the same will be discussed below with reference to FIGS.
11
(
a
) to
11
(
d
).
First, conductive layers such as copper foils are formed on opposite surfaces of an insulating substrate (insulating layer)
10
in the form of a sheet or plate and made of a resin material such as polyimide. The conductive layers of the insulating substrate
10
are etched so that a wiring substrate
14
comprised of the insulating substrate
10
and predetermined circuit patterns (wiring layers)
12
formed on opposite surfaces thereof can be obtained, as shown in FIG.
11
(
a
).
Thereafter, through holes
16
, which extend through the insulating substrate
10
and the wiring layers
12
, are formed at portions at which the wiring layers
12
of the wiring substrates
14
to be superimposed are to be electrically connected, as shown in FIG.
11
(
b
).
Thereafter, the inner peripheral surfaces of the through holes
16
and the surface portions of the wiring layers
12
corresponding to the through holes
16
are coated with, for example, copper plating
18
, so that connecting portions (so-called “vias”)
18
for establishing electrical connection between the wiring layers
12
on the opposite surfaces of the insulating substrate
10
are formed, as shown in FIG.
11
(
c
). Note that upon plating the inner peripheral surface of the through holes
16
, electroless plating is first conducted, and thereafter, electroplating is conducted.
A plurality of wiring substrates
14
are superimposed through an adhesive
21
.
To electrically connect the wiring layers
12
of the wiring substrates
14
, the connecting portions
18
of the insulating substrates
10
are aligned along lines in the direction of the superimposition, and a heated reflowable alloy (first conductor)
22
, such as a solder is introduced in the aligned connecting portions
18
to connect the same, as shown in FIG.
11
(
d
). Consequently, a multi-layered wiring substrate
23
in which the wiring layers
12
of the wiring substrates
14
are electrically connected is obtained.
FIGS. 12 and 13
show a known multi-layered semiconductor device in which electrical connection between the layers is established by solder balls.
FIG. 12
shows a side sectional view of the whole structure of the semiconductor device and
FIG. 13
shows an enlarged view of the part “A” in FIG.
12
. In the prior art shown in
FIGS. 12 and 13
, a circuit pattern (wiring layer)
12
of copper is formed on one surface of an insulating substrate
10
made of a resin material, such as polyimide and a semiconductor chip
40
is formed thereon. The semiconductor packages are multi-layered to form a multi-layered semiconductor device. The insulating substrates
10
are provided with through holes
16
extending therethrough and wiring layers
12
which are formed and exposed on one surface of each insulating substrate. The electrical connection between the layers is established by reflowable solder balls
15
. introduced in the through holes
16
, so that the solder balls are brought into contact with the wiring layers
12
on the adjacent insulating substrates
10
. Note that, in
FIG. 13
, numeral
20
designates the adhesive to secure the insulating substrates (polyimide)
10
and the wiring layers (e.g., copper)
12
, and numeral
17
designates the solder resist.
However, in the known process of fabricating a multi-layered wiring substrate shown in FIGS.
11
(
a
) to
11
(
d
), it is necessary to use a wiring substrate provided, on the opposite surfaces of the insulating layers thereof, with the conductive layers, thus resulting in an increase in the cost of the elements. Moreover, in the process of formation of the connecting portions, electroless plating is necessary, thus leading to an increase in the manufacturing cost. Furthermore, since the wiring substrates which are each provided with the conductor layers formed on the opposite surfaces of the insulating layer are superimposed, the thickness of the multi-layered wiring substrate is increased.
In the known multi-layered semiconductor device shown in
FIGS. 12 and 13
, since the insulating substrates which are each provided on only one surface with the wiring layer, the cost can be reduced, but it is necessary to provide a space between the insulating substrates or semiconductor devices for the solder
15
to electrically connect the layers. Consequently, it is difficult to obtain a multi-layered wiring substrate or semiconductor device whose thickness is satisfactorily small.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide thin and inexpensive multi-layered wiring substrate and semiconductor device, in which it is not necessary to use the wiring substrate having conductor layers formed on opposite surfaces of the insulating layer or to carry out an electroless plating operation.
To achieve the object, the present invention is constructed as follows. Namely, a multi-layered wiring substrate according to the present invention in which wiring layers and insulating layers are alternately superimposed, and at least a pair of insulating layers formed on front and rear surfaces of the insulating layers are electrically connected by connecting portions extending through the insulating layers is characterized in that the wiring layers and the insulating layers are formed by superimposing wiring substrates, each being made of a plate or sheet provided on only one of the surfaces of the insulating layer with a wiring-layer, in such a way that the wiring layers and the insulating layers are alternately arranged, -wherein the connecting portions are provided with extensions formed by a part of the wiring layers extending into the area of opening portions which extend through the insulating layers of the wiring substrates, so that the extensions and the wiring layers of the adjacent wiring substrate, located adjacent the insulating layer thereof, are electrically connected through low melting metal portions.
The portions can be through holes formed in the insulating layers. Alternatively, the holes may be cut-away portions formed at the peripheries of the insulating layers.
The low melting metal portions can be solder balls or solder pastes, or materials derived therefrom.
A semiconductor device according to the present invention can be comprised of a multi-layered wiring substrate which is provided with the wiring substrates which are in turn provided on the insulating layers thereof with recesses in which the semiconductor elements are received, and the wiring layers which define, at their one end, lead portions electrically connected to electrode terminals of the semiconductor elements and, at the other ends, extensions extending in the opening portions, and semiconductor elements which are arranged in the recesses so that the surfaces thereof on which the electrode terminals are formed are oriented toward the wiring layers, so that the lead portions of the wiring layers are electrically connected to the electrode terminals.


REFERENCES:
patent: 6180881 (2001-01-01), Isaak

Affiliated with

Also associated with

Rating

Multi-layer wiring board substrate and semiconductor device... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-layer wiring board substrate and semiconductor device..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-layer wiring board substrate and semiconductor device... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3182898