Multi-layer printed circuit board fabrication system and method

Details Multi-layer printed circuit board fabrication system and method Multi-layer printed circuit board fabrication system and method

2007-10-16

2007-10-16

Werner, Brian P. (Department: 2624)

Image analysis

Applications

Manufacturing or product inspection

C382S147000, C382S287000, C438S016000, C348S126000

Reexamination Certificate

active

10045651

ABSTRACT:
A method for aligning an image to be recorded by a direct image scanner on an upper layer of a printed circuit board with an image recorded on a lower layer thereof, the method comprising:visually imaging a portion of the image on the lower layer; andrecording a pattern on the upper layer, referenced to coordinates of the visual image of the portion.

REFERENCES:
patent: 4566038 (1986-01-01), Dimick
patent: 4680627 (1987-07-01), Sase et al.
patent: 4894790 (1990-01-01), Yotsuya et al.
patent: 5156772 (1992-10-01), Allan et al.
patent: 5161202 (1992-11-01), Kitakado et al.
patent: 5170058 (1992-12-01), Berasi et al.
patent: 5388517 (1995-02-01), Levien
patent: 5402726 (1995-04-01), Levien
patent: 5529441 (1996-06-01), Kosmowski et al.
patent: 5548372 (1996-08-01), Schroeder et al.
patent: 5643699 (1997-07-01), Waldner
patent: 5768443 (1998-06-01), Michael et al.
patent: 5856844 (1999-01-01), Batterman et al.
patent: 5963781 (1999-10-01), Winer
patent: 5980088 (1999-11-01), Iwasaki et al.
patent: 6030154 (2000-02-01), Whitcomb et al.
patent: 6064757 (2000-05-01), Beaty et al.
patent: 6165658 (2000-12-01), Taff et al.
patent: 6205364 (2001-03-01), Lichtenstein et al.
patent: 6246789 (2001-06-01), Hosotani et al.
patent: 6268920 (2001-07-01), Ohlig
patent: 6449516 (2002-09-01), Kyomasu et al.
patent: 6567713 (2003-05-01), Lichtenstein et al.
patent: 2002/0015165 (2002-02-01), Taka et al.
patent: 2004/0222197 (2004-11-01), Hiramatsu
patent: 2005/0263498 (2005-12-01), Hiramatsu
patent: 2006/0138097 (2006-06-01), Hiramatsu
patent: 2006/0138098 (2006-06-01), Hiramatsu
patent: 247392 (1995-05-01), None
patent: 2 288 229 (1995-10-01), None
patent: 09-172255 (1997-06-01), None
patent: 10-41636 (1998-02-01), None
patent: 10-084184 (1998-03-01), None
IBM Technical Disclosure Bulletin; NN950689; “Product Alignment Method for Probing Systems;” 3 pages Jun. 1, 1995.
Brochure from the BARCO corporation,titled “Gemini Laser Direct Imaging, a Profitable Reality for Your Shop;” copyright 2000.

Affiliated with

Also associated with

Rating

Multi-layer printed circuit board fabrication system and method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multi-layer printed circuit board fabrication system and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-layer printed circuit board fabrication system and method will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3900619