Multi-layer overlay measurement and correction technique for...

Details Multi-layer overlay measurement and correction technique for... Multi-layer overlay measurement and correction technique for...

2006-06-20

2006-06-20

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C430S022000, C430S030000

Reexamination Certificate

active

07065737

ABSTRACT:
A system facilitating measurement and correction of overlay between multiple layers of a wafer is disclosed. The system comprises an overlay target that represents overlay between three or more layers of a wafer and a measurement component that determines overlay error existent in the overlay target, thereby determining overlay error between the three or more layers of the wafer. A control component can be provided to correct overlay error between adjacent and non-adjacent layers, wherein the correction is based at least in part on measurements obtained by the measurement component.

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