Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2008-05-20
2008-05-20
Goudreau, George A. (Department: 1792)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S239000, C438S694000, C430S005000
Reexamination Certificate
active
07375033
ABSTRACT:
An integrated circuit interconnect is fabricated by using a mask to form a via in an insulating layer for a conductive plug. After the plug is formed in the via, a thin (e.g., <100 nm) isolation layer is deposited over the resulting structure. An opening is created in the isolation layer by using the same mask at a different radiation exposure level to make the opening more narrow than the underlying plug. A conductive line is then formed which makes electrical contact with the plug through the opening in the isolation layer. By vertically separating and electrically isolating the conductive plug from adjacent conductive lines, the isolation layer advantageously reduces the likelihood of an undesired electrical short occurring between the conductive plug and a nearby conductive line.
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Albertson Todd
Anderson Mark
Miller Darin
Goudreau George A.
Knobbe Martens Olson & Bear LLP
Micro)n Technology, Inc.
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