Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1999-01-26
2000-12-12
Hardy, David
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
413366, 413250, 413 52, 413751, H01L 2976, H01L 2994, H01L 31062, H01L 31113, H01L 31119
Patent
active
061603007
ABSTRACT:
A fabrication process and transistor are described in which a transistor having a diffusion barrier located in the bottom layer of a stacked (i.e., multi-layer) gate conductor is formed, thereby reducing the diffusion of dopants from the gate conductor to the underlying channel region. In a general embodiment, multiple gate conductor layers are formed and arranged in a vertical stack, and a diffusion barrier is introduced into one or more layers of the stack. In a preferred dual-layer embodiment, a first gate conductor layer (i.e., the bottom layer) having a first thickness is deposited upon a gate dielectric layer. An argon distribution is then introduced into the first gate conductor layer to form an argon diffusion barrier in the first gate conductor layer. A second gate conductor layer having a second thickness is then deposited upon the first gate conductor layer. The second thickness is preferably greater than the first thickness, which in turn is greater than the thickness of the argon diffusion barrier residing within the first gate conductors layer. The thickness of the first gate conductor layer is controlled to facilitate location of the diffusion barrier, thereby presenting numerous advantages over conventional barrier formation techniques.
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Gardner Mark I.
May Charles E.
Wristers Derick J.
Advanced Micro Devices , Inc.
Daffer Kevin L.
Fenty Jesse A.
Hardy David
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