Multi-layer C4 flip-chip substrate

Details Multi-layer C4 flip-chip substrate Multi-layer C4 flip-chip substrate

1996-08-07

1998-07-28

Arroyo, Teresa M.

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

257737, 257700, 257723, 257924, 257778, H01L 2348, H01L 2352, H01L 23053, H01L 2302

Patent

active

057866309

ABSTRACT:
An integrated circuit package which contains an integrated circuit that is mounted to a plurality of contact pads located on a top surface of a substrate. The package may also have a number of capacitors that are mounted to the contact pads. The substrate has an internal first power plane and an internal first ground plane located adjacent to the top surface and coupled to the contact pads by a plurality of vias. The power and ground planes are coupled to the capacitors and the integrated circuit, such that the capacitors filter power that is provided to the circuit. Locating the power and ground planes near the top surface minimizes the length of the vias and lowers the self inductance of the package. The contact pads of the capacitors may be arranged in alternating rows of ground and power to increase the mutual inductance and lower the effective inductance of the package. The package has additional power/ground planes and layers of signal routing traces located between the first ground plane and the bottom surface to couple the contact pads with a plurality of pins that extend from the bottom surface of the package. The first power and ground planes are separated by a dielectric spacing that is significantly smaller than the dielectric spacing separating the other planes and traces. The smaller dielectric spacing increases the capacitance and reduces the effective inductance of the substrate to reduce the switching noise of the integrated circuit.

REFERENCES:
patent: 5508938 (1996-04-01), Wheeler
patent: 5608261 (1997-03-01), Bhattacharyya et al.
patent: 5635761 (1997-06-01), Cao et al.
patent: 5635767 (1997-06-01), Wenzel et al.
patent: 5654590 (1997-08-01), Kuramochi

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