Multi-interfaced memory

Details Multi-interfaced memory Multi-interfaced memory

2005-11-30

2008-12-30

Peikari, B. James (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S167000, C711S001000, C710S038000

Reexamination Certificate

active

07472235

ABSTRACT:
A multi-interfaced memory device includes an array of memory cells having a first interface and a second interface. The first interface and the second interface share an address bus and a data bus. One of the interfaces may be a random access memory interface and the second interface may be a paged access interface.

REFERENCES:
patent: 6522648 (2003-02-01), Heering et al.
patent: 6859410 (2005-02-01), Scheuerlein et al.
patent: 6894941 (2005-05-01), Kurjanowicz et al.
patent: 2003/0182522 (2003-09-01), Yoo et al.
patent: 2005/0204090 (2005-09-01), Eilert
patent: 2005/0281095 (2005-12-01), Eilert

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