Multi-gate carbon nano-tube transistors

Details Multi-gate carbon nano-tube transistors Multi-gate carbon nano-tube transistors

2005-12-06

2005-12-06

Cao, Phat X. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S419000

Reexamination Certificate

active

06972467

ABSTRACT:
According to one aspect of the invention, a semiconducting transistor is described. The channel portion of the transistor includes carbon nanotubes formed on top of an insulating layer which covers a local bottom gate. Source and drain conductors are located at ends of the carbon nanotubes. A gate dielectric surrounds a portion of the carbon nanotubes with a substantially uniform thickness. A local top gate is located between the source and drain conductors over the carbon nanotubes. Lower portions of the local top gate are positioned between the carbon nanotubes as the local top gate forms pi-gates or “wraparound” gates around each carbon nanotube.

REFERENCES:
patent: 2003/0098488 (2003-05-01), O'Keeffe et al.
patent: 2004/0238887 (2004-12-01), Nihey
Guo, Jing et al., Performance projections for ballistic carbon nanotube field-effect transistors,Applied Physics Letters, vol. 80, No. 17, Apr. 29, 2002, 3192-3194.
Javey, Ali et al., High-κ dielectrics for advanced carbon-nanotube transistors and logic gates,Advance Online Publication, Nov. 17, 2002, pgs. 1-6.
Martel, Richard et al., Carbon Nanotube Field Effect Transistors for Logic Applications, IBMT.J. Watson Research Center, 2001 IEEE, IEDM 01-159-162, 4 pp..

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