Abrading – Abrading process – With tool treating or forming
Reexamination Certificate
2000-05-18
2003-06-03
Hail, III, Joseph J. (Department: 3723)
Abrading
Abrading process
With tool treating or forming
C451S443000
Reexamination Certificate
active
06572453
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of semiconductor processing, and more particularly to a method and apparatus for polishing and/or planarizing semiconductor wafers and the thin films formed thereon.
BACKGROUND OF THE INVENTION
Semiconductor devices are formed on silicon substrates and are typically multi-layered, having numerous metalization layers separated by numerous insulating oxides and interconnected with vias or contact holes. For instance, an interconnect for a typical multi-layer device is formed by depositing and patterning a first metal layer over the device, depositing an intermediate oxide over the patterned first metal layer, photolithographically defining a contact hole in the oxide, and depositing a second metal layer over the oxide that fills the contact hole and contacts the patterned first metal layer.
Often undesirable steps or undulations must be removed from the silicon substrate or from one of the metal or oxide layers before another layer can be formed thereon. To remove steps or undulations, the silicon oxide or metal is preferably planarized, removing any steps or undulations formed therein, prior to deposition of a layer thereon. Planarization is typically performed mechanically by forcing the semiconductor wafer face down against a polishing pad which is saturated with a polishing fluid (e.g., a slurry or polishing chemical) and by moving the polishing pad relative to the wafer. The relative movement between the polishing pad and the wafer mechanically removes layers of material and is continued until the steps or undulations are removed. This process is generally referred to as chemical mechanical polishing (CMP).
To facilitate material removal during the CMP process the polishing pad may be provided with grooves that channel polishing fluid to the polishing pad/wafer interface, and that provide a path for wafer material to be removed from the polished wafer surface, and/or the pad may be made porous to hold the slurry chemical and polishing by-product.
During polishing, however, the downward force of the wafer against the polishing pad compacts polishing fluid particles and polishing by products within these grooves and porous structures, reducing the supply of fresh polishing fluid or polishing chemical to the polishing pad/wafer interface, reducing friction between the wafer and the pad, reducing the removal rate of wafer material, and the overall polishing efficiency, uniformity and throughput of the CMP process, as well as giving rise to defects in the form of wafer scratches, as described below, and increasing dishing of the wafer surface. Additionally, the downward force of the wafer against the polishing pad causes the semi-porous surface of the polishing pad to pack down, causing polishing rates to become low and unpredictable, and necessitating frequent polishing pad replacement.
To extend the useful life of a polishing pad, a pad conditioner that roughens or “conditions” the polishing pad surface is employed in-situ, while the polishing pad polishes a wafer and while a polishing chemical/slurry is supplied to the pad surface; or ex-situ, after wafer polishing is complete, and while deionized water is supplied to the pad surface. A typical pad conditioner comprises a diamond surface that roughens the polishing pad surface by scribing additional “microgrooves” in the polishing pad surface. Roughening of the polishing pad surface ensures adequate abrasion (e.g., due to polishing fluid saturation of the roughened surface) at the polishing pad/wafer interface. In certain applications however, unstable polishing rates none-the-less persist. Accordingly, an improved polisher method and apparatus is needed.
SUMMARY OF THE INVENTION
The present inventors have discovered that polishing of wafers having certain material layers (e.g., copper layers) deposited thereon results in the build up of materials on the polishing pad. Such build up is not removable via conventional conditioning methods. Accordingly the present invention provides a method and apparatus that avoids the build up of polishing by products from the polishing pad without the reduction in throughput associated with conventional ex-situ conditioning. Conventional ex-sit conditioning tends to reduce system throughput as additional time is required for moving the wafer into and out of contact with the polishing pad. Specifically, a polishing method is provided which simultaneously supplies both a polishing fluid and a conditioning fluid to a polishing pad, while a substrate is in moving contact with the polishing pad.
Other features and advantages of the present invention will become more fully apparent from the following detailed description of the preferred embodiments, the appended claims and the accompanying drawings.
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Bennett Doyle E.
Brown Brian J.
Chandrachood Madhavi
Redeker Fred C.
Tsai Stan D.
Applied Materials Inc.
Dugan & Dugan
Hail III Joseph J.
Thomas David B.
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