Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-01-02
1998-11-03
Wallace, Valencia
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257355, 257357, 257375, H01L 2900
Patent
active
058313168
ABSTRACT:
A multi-finger MOS transistor element is provided in which all of the base resistance values of parasitic bipolar transistors (NPN, if an NMOS, or PNP, if a PMOS transistor) in each finger MOS are equal to each other. Thus, each finger MOS transistor element in the multi-finger MOS transistor is turned on simultaneously to enhance ESD protection performance. In the multi-finger MOS transistor, the diffusion region for providing the well/substrate contact is distributed in the source region to make the base resistance value of the parasitic NPN (or PNP) transistor in each finger MOS equal to each other.
The multi-finger MOS of the invention includes a plurality of drain regions, each having drain contacts, a plurality of source regions, each having source contacts, and a plurality of gate regions, wherein each gate region is between each drain region and the source region; a bias diffusion region formed in the source region along a middle line which is equally spaced between the pair of gate regions.
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Chen et al., "Design and Layout of a High ESD Performance NPN Sructure for Submicron BiCMOS/Bipolar Circuits", IEEE, 227-232, (1996).
Hsu et al., "An Analytical Breakdown Model for Short-Channel MOSFET's", IEEE Transactions on Electron Devices, 29(11):1735-1739, (1982).
Polgreen et al., "Improving the ESD Failure Threshold of Silicided n-MOS Output Transistors by Ensuring Uniform Current Flow", IEEE, 379-388, (1992).
Young Konrad
Yu Ta-Lee
Wallace Valencia
Winbond Electronics Corp.
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