Multi-emitter bipolar transistor for bandgap reference circuits

Details Multi-emitter bipolar transistor for bandgap reference circuits Multi-emitter bipolar transistor for bandgap reference circuits

2001-12-27

2004-03-02

Toatley, Jr., Gregory J. (Department: 2836)

Electrical transmission or interconnection systems

Conductor arrangements or structure

Multipart-conductor current equalization

C257S579000, C257S584000, C257S587000

Reexamination Certificate

active

06700226

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATION
This application is based upon and claims priority from prior European Patent Application No. 00830851.2, filed on Dec. 28, 2000, the entire disclosure of which is herein incorporated by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention generally relates to a multi-emitter bipolar transistor for bandgap reference circuits, and more particularly to a multi-emitter vertical bipolar transistor to be used as reference in bandgap circuits.
2. Description of the Related Art
In the modern microelectronic devices based on CMOS technology voltages are internally produced and used, such as, for example, negative voltages and/or high voltages, distinct from supply voltage.
The circuits for the management of the various produced voltages need of a precise and stable voltage reference both at the supply voltage oscillations and at the temperature changes. A reference of such a nature is obtained by means of a circuit known as “bandgap reference”.
Such a circuit usually uses bipolar transistors so as to make full use of the characteristic of the bipolar transistors to have a current voltage law exponentially linked, in turn correlated with the energetic gap of the starting semiconductor.
In fact the way of working of the bandgap circuits provides for comparing the current flowing in a bipolar with that flowing in other “n” bipolars connected in parallel. Each one of “n+1” bipolars is connected as diode, that is it has the base and collector electrodes short circuited.
In the reference bandgap circuits, implemented by CMOS technology with p type substrate, or implemented in technologies according to which masks or specific steps are not provided to realize bipolar transistors, pnp type vertical transistors are used.
For a n type substrate the dual principle is valid.
The pnp transistor is implemented making opportunely full use of some steps and necessary structures for the realization of complementary MOSFET transistors, that is the availability of an usual P+ implant, adapted for making the source and drain junction of the MOSFET transistors, and of a N well, adapted for making the channel of the MOS transistor with p channel and the p substrate itself, makes easily available the possibility to obtain the pnp vertical bipolar transistor.
In the process of implementation of these pnp type vertical bipolar transistors all the projecting laws relating to the distances and minimum sizes, relating to the active areas in the N well and to the P+ active areas placed in the substrate around the N well should be respected.
By implementing a structure with this standard CMOS technology a remarkable waste of area is obtained and, therefore, there is a lower integration of the devices.
Moreover an adequate electric coupling among the devices making the circuit is not obtainable.
Accordingly, there exists a need for overcoming the disadvantages of the prior art as discussed above.
SUMMARY OF THE INVENTION
In view of the state of the art described, a multi-emitter bipolar transistor for bandgap reference circuits, according to a preferred embodiment of the present invention, is able to avoid to the problems of the prior art.
According to a preferred embodiment of the present invention, a transistor comprises a substrate region of a first type of conductivity in a semiconductor material layer of the same type of conductivity, at least a first contact region of the first type of conductivity inside the substrate region and adjacent to a first terminal of the transistor, a well of second type of conductivity placed inside the substrate region, wherein the well of second type of conductivity comprises at least a second contact region of a second type of conductivity adjacent to a region of a second terminal of the transistor, adjacent to a region of a second terminal of the transistor, and a plurality of third contact regions of the first type of conductivity adjacent to a plurality of regions of a third terminal of the transistor interposed each other by opportune insulating shapes.
Thanks to the present invention it is possible to realize a remarkable saving of silicon area.
Moreover it is possible to have a better coupling of the electric characteristics of the device.
Moreover it is possible to have a simplification of the interconnections among the several devices of the circuit.
Moreover it is possible to have an optical shield of the multi-emitter bipolar devices constituting the bandgap reference circuit.
In particular, this last advantage allows a better stability of the voltage reference in devices with an Ultra Violet (UV) erasing package and, in general, for the steps of Electrical Wafer Sort (EWS), that is for the testing steps on wafer of every single chip even if it is not make in the dark.


REFERENCES:
patent: 439 163 (1991-07-01), None
patent: 1546423 (1967-12-01), None
European Search Report dated Aug. 20, 2001 for European Patent Application No. 00830851.

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