Multi-elevation singulation of device laminates in wafer...

Details Multi-elevation singulation of device laminates in wafer... Multi-elevation singulation of device laminates in wafer...

2008-01-22

2008-01-22

Lee, Calvin (Department: 2818)

Semiconductor device manufacturing: process

Semiconductor substrate dicing

Having specified scribe region structure

C257S113000

Reexamination Certificate

active

07320930

ABSTRACT:
Wafer scale and substrate processing device singulation methods, and devices made by the methods, for singulation of discrete devices from a processed wafer or laminated structures, involves formation of separation scribes or saw cuts at multiple elevations in intersecting scribe streets or lines so that a separation cut in one direction is at a different depth than a separation cut in a different and intersecting direction. Separation or fracture of the wafer or laminated structure along one of the separation cuts does not transfer to the separation line of the intersecting separation cut due to the difference in depth of the intersecting cuts or scribes, and due to the difference in elevation of the bottom surfaces of the cuts or scribes within the scribe streets, resulting in cleaner edges on the separated devices.

REFERENCES:
patent: 3680213 (1972-08-01), Reichert
patent: 5059899 (1991-10-01), Farnworth et al.
patent: 5832601 (1998-11-01), Eldridge et al.
patent: 5963289 (1999-10-01), Stefanov et al.
patent: 6150240 (2000-11-01), Lee et al.
patent: 6422227 (2002-07-01), Kobayashi et al.
patent: 6568384 (2003-05-01), Onizaki
patent: 2002/0114507 (2002-08-01), Lynch et al.
patent: 2002/0162438 (2002-11-01), Lim et al.
patent: 2003/0232488 (2003-12-01), Chua et al.
patent: 2004/0180514 (2004-09-01), Chao et al.

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